®
74V1T00
SINGLE 2-INPUT NAND GATE
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 5 ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 1
µA
(MAX.) at T
A
= 25
o
C
COMPATIBLE WITH TTL OUTPUTS:
V
IH
= 2V (MIN), V
IL
= 0.8V (MAX)
POWER DOWN PROTECTION ON INPUTS &
OUTPUT
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8 mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
IMPROVED LATCH-UP IMMUNITY
S
(SOT23-5L)
C
(SC-70)
ORDER CODE:
74V1T00S
74V1T00C
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
DESCRIPTION
The 74V1T00 is an advanced high-speed CMOS
SINGLE 2-INPUT NAND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
PIN CONNECTION AND IEC LOGIC SYMBOLS
October 1999
1/7
74V1T00
INPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
1
2
4
3
5
SYMBOL
1A
1B
1Y
GND
V
CC
NAME AND FUNCT ION
Data Input
Data Input
Data Output
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
A
L
L
H
H
B
L
H
L
H
Y
H
H
H
L
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
V
O
I
IK
I
OK
I
O
T
stg
T
L
Supply Voltage
DC Input Voltage
DC Output Voltage (see note 1)
DC Output Voltage (see note 2)
DC Input Diode Current
DC Output Diode Current
DC Output Current
Storage Temperature
Lead Temperature (10 sec)
Parameter
Value
-0.5 to +7.0
-0.5 to +7.0
-0.5 to +7.0
-0.5 to V
CC
+ 0.5
- 20
±
20
±
25
±
50
-65 to +150
260
Unit
V
V
V
V
mA
mA
mA
mA
o
o
I
CC
or I
GND
DC V
CC
or Ground Current
C
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
1) V
CC
=0V
2) High or Low State
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
V
O
T
op
dt/dv
Supply Voltage
Input Voltage
Output Voltage (see note 1)
Output Voltage (see note 2)
Operating Temperature
Input Rise and Fall Time (see note 3) (V
CC
= 5.0
±
0.5V)
Parameter
Valu e
4.5 to 5.5
0 to 5.5
0 to 5.5
0 to V
CC
-40 to +85
0 to 20
Unit
V
V
V
V
o
C
ns/V
1) V
CC
=0V
2) High or Low State
3)V
IN
from0.8V to 2 V
2/7
74V1T00
DC SPECIFICATIONS
Symb ol
Parameter
T est Cond ition s
V
CC
(V)
V
IH
V
IL
V
OH
V
OL
I
I
I
CC
∆
I
CC
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
Low Level Output
Voltage
Input Leakage Current
Quiescent Supply
Current
Additional Worst Case
Supply Current
Output Leakage
Current
4.5 to 5.5
4.5 to 5.5
4.5
4.5
4.5
4.5
0 to 5.5
5.5
5.5
I
O
=-50
µA
I
O
=-8 mA
I
O
=50
µA
I
O
=8 mA
V
I
= 5.5V or GND
V
I
= V
CC
or GND
One Input at 3.4V,
other input at V
CC
or
GND
V
OUT
= 5.5V
0
4.4
3.94
0.0
0.1
0.36
±
0.1
1
1.35
4.5
o
Value
T
A
= 25 C
Min.
2
0.8
4.4
3.8
0.1
0.44
±
1.0
10
1.5
Typ .
Max.
-40 to 85 C
Min .
2
0.8
Max.
o
Un it
V
V
V
V
µ
A
µA
mA
I
OPD
0
0.5
5.0
µA
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
=3 ns)
Symb ol
Parameter
Test Co ndition
V
CC
(*)
C
L
(p F)
(V)
5.0
5.0
15
50
Value
T
A
= 25 C
o
Un it
-40 to 85 C
Min .
1.0
1.0
Max.
8.0
9.0
o
Min.
t
PLH
t
PHL
Propagation Delay
Time
Typ .
5.0
5.5
Max.
7.0
8.0
ns
(*) Voltage range is 5V
±
0.5V
CAPACITIVE CHARACTERISTICS
Symb ol
Parameter
T est Cond ition s
o
Value
T
A
= 25 C
Min.
Typ .
4
10.5
Max.
10
-40 to 85 C
Min .
Max.
10
o
Un it
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance (note 1)
pF
pF
1) C
PD
isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto
Test Circuit).Average operating current can be obtained by the following equation. I
CC
(opr) = C
PD
•
V
CC
•f
IN
+ I
CC
3/7
74V1T00
TEST CIRCUIT
C
L
= 15/50 pF or equivalent (includes jig and probe capacitance)
R
T
= Z
OUT
of pulse generator (typically 50Ω)
WAVEFORM: PROPAGATION DELAYS
(f=1MHz; 50% duty cycle)
4/7
京公网安备 11010802033920号
EEWORLD
