EEWORLDEEWORLDEEWORLD

Part Number

Search

UPD4483362GF-A75-A

Description
Cache SRAM, 256KX36, 3.8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, LQFP-100
Categorystorage    storage   
File Size145KB,20 Pages
ManufacturerNEC Electronics
Environmental Compliance
Download Datasheet Parametric Compare View All

UPD4483362GF-A75-A Overview

Cache SRAM, 256KX36, 3.8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, LQFP-100

UPD4483362GF-A75-A Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
package instruction14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, LQFP-100
Reach Compliance Codecompliant
Maximum access time3.8 ns
JESD-30 codeR-PQFP-G100
JESD-609 codee6
length20 mm
memory density9437184 bit
Memory IC TypeCACHE SRAM
memory width36
Number of functions1
Number of terminals100
word count262144 words
character code256000
Operating modeSYNCHRONOUS
Maximum operating temperature50 °C
Minimum operating temperature
organize256KX36
Package body materialPLASTIC/EPOXY
encapsulated codeLQFP
Package shapeRECTANGULAR
Package formFLATPACK, LOW PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height1.7 mm
Maximum supply voltage (Vsup)3.465 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTIN BISMUTH
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationQUAD
Maximum time at peak reflow temperature10
width14 mm
Base Number Matches1
PRELIMINARY DATA SHEET
MOS INTEGRATED CIRCUIT
μ
PD4483362
8M-BIT CMOS SYNCHRONOUS FAST STATIC RAM
256K-WORD BY 36-BIT
HSTL INTERFACE / REGISTER-REGISTER / LATE WRITE
Description
The
μ
PD4483362 is a 262,144 words by 36 bits synchronous static RAM fabricated with advanced CMOS
technology using Full-CMOS six-transistor memory cell.
The
μ
PD4483362 is suitable for applications which require synchronous operation, high-speed, low voltage, high-
density memory and wide bit configuration, such as cache and buffer memory.
The
μ
PD4483362 is packaged in 100-pin PLASTIC LQFP with a 1.4 mm package thickness for high density and low
capacitive loading.
Features
Fully synchronous operation
HSTL Input / Output levels
Fast clock access time : 3.8 ns (133 MHz)
Asynchronous output enable control : /G
Byte write control : /SBa (DQa1-9), /SBb (DQb1-9), /SBc (DQc1-9), /SBd (DQd1-9)
Common I/O using three-state outputs
Internally self-timed write cycle
Late write with 1 dead cycle between Read-Write
3.3 V (Chip) / 1.5 V (I/O) supply
100-pin PLASTIC LQFP package, 14 mm x 20 mm
Sleep Mode : ZZ (Enables sleep mode, active high)
Ordering Information
Part number
Access time
3.8 ns
Clock frequency
133 MHz
Package
100-pin PLASTIC LQFP (14 x 20)
μ
PD4483362GF-A75
<R>
<R>
μ
PD4483362GF-A75-A
Remark
Products with -A at the end of the part number are lead-free products.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. M14440EJ2V0DS00 (2nd edition)
The mark <R> shows major revised points.
Date Published February 2006 NS CP(K)
Printed in Japan
The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.

UPD4483362GF-A75-A Related Products

UPD4483362GF-A75-A UPD4483362GF-A75
Description Cache SRAM, 256KX36, 3.8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, LQFP-100 Cache SRAM, 256KX36, 3.8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, LQFP-100
Is it Rohs certified? conform to incompatible
package instruction 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, LQFP-100 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, LQFP-100
Reach Compliance Code compliant compliant
Maximum access time 3.8 ns 3.8 ns
JESD-30 code R-PQFP-G100 R-PQFP-G100
JESD-609 code e6 e0
length 20 mm 20 mm
memory density 9437184 bit 9437184 bit
Memory IC Type CACHE SRAM CACHE SRAM
memory width 36 36
Number of functions 1 1
Number of terminals 100 100
word count 262144 words 262144 words
character code 256000 256000
Operating mode SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 50 °C 50 °C
organize 256KX36 256KX36
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code LQFP LQFP
Package shape RECTANGULAR RECTANGULAR
Package form FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE
Parallel/Serial PARALLEL PARALLEL
Peak Reflow Temperature (Celsius) 260 NOT SPECIFIED
Certification status Not Qualified Not Qualified
Maximum seat height 1.7 mm 1.7 mm
Maximum supply voltage (Vsup) 3.465 V 3.465 V
Minimum supply voltage (Vsup) 3.135 V 3.135 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL
Terminal surface TIN BISMUTH TIN LEAD
Terminal form GULL WING GULL WING
Terminal pitch 0.65 mm 0.65 mm
Terminal location QUAD QUAD
Maximum time at peak reflow temperature 10 NOT SPECIFIED
width 14 mm 14 mm
Base Number Matches 1 1

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2088  1440  1893  1596  2315  43  29  39  33  47 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号