74VHC4316 Quad Analog Switch with Level Translator
April 1994
Revised April 1999
74VHC4316
Quad Analog Switch with Level Translator
General Description
These devices are digitally controlled analog switches
implemented in advanced silicon-gate CMOS technology.
These switches have low “on” resistance and low “off” leak-
ages. They are bidirectional switches, thus any analog
input may be used as an output and vice-versa. Three sup-
ply pins are provided on the 4316 to implement a level
translator which enables this circuit to operate with 0V–6V
logic levels and up to
±6V
analog switch levels. The 4316
also has a common enable input in addition to each
switch's control which when HIGH will disable all switches
to their off state. All analog inputs and outputs and digital
inputs are protected from electrostatic damage by diodes
to V
CC
and ground.
Features
s
Typical switch enable time: 20 ns
s
Wide analog input voltage range:
±6V
s
Low “on” resistance: 50 typ. (V
CC
−V
EE
=
4.5V)
30 typ. (V
CC
−V
EE
=
9V)
s
Low quiescent current: 80
µA
maximum (74VHC)
s
Matched switch characteristics
s
Individual switch controls plus a common enable
s
Pin functional compatible with 74HC4316
Ordering Code:
Order Number
74VHC4316M
74VHC4316WM
74VHC4316MTC
74VHC4316N
Package Number
M16A
M16B
MTC16
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Truth Table
Inputs
E
H
L
L
CTL
X
L
H
Switch
I/O–O/I
“OFF”
“OFF”
“ON”
Connection Diagram
Top View
Logic Diagram
© 1999 Fairchild Semiconductor Corporation
DS011678.prf
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74VHC4316
Absolute Maximum Ratings
(Note 1)
(Note 2)
Supply Voltage (V
CC
)
Supply Voltage (V
EE
)
DC Control Input Voltage (V
IN
)
DC Switch I/O Voltage (V
IO
)
Clamp Diode Current (I
IK
, I
OK
)
DC Output Current, per pin (I
OUT
)
DC V
CC
or GND Current, per pin (I
CC
)
Storage Temperature Range (T
STG
)
Power Dissipation (P
D
) (Note 3)
S.O. Package only
Lead Temperature (T
L
)
(Soldering 10 seconds)
260°C
−0.5
to
+7.5V
+0.5
to
−7.5V
−1.5
to V
CC
+1.5V
V
EE
−0.5
to V
CC
+0.5V
±20
mA
±25
mA
±50
mA
−65°C
to
+150°C
600 mW
500 mW
Recommended Operating
Conditions
Min
Supply Voltage (V
CC
)
Supply Voltage (V
EE
)
DC Input or Output Voltage
(V
IN
, V
OUT
)
Operating Temperature Range (T
A
)
Input Rise or Fall Times
(t
r
, t
f
)
V
CC
=
2.0V
V
CC
=
4.5V
V
CC
=
6.0V
V
CC
=
12.0V
1000
500
400
250
ns
ns
ns
ns
−40
+85
°C
2
0
0
Max
6
−6
V
CC
Units
V
V
V
Note 1:
Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2:
Unless otherwise specified all voltages are referenced to ground.
Note 3:
Power Dissipation temperature derating — plastic “N” package:
−
12 mW/°C from 65°C to 85°C.
DC Electrical Characteristics
Symbol
V
IH
Parameter
Minimum HIGH
Level Input
Voltage
V
IL
Maximum LOW
Level Input
Voltage
R
ON
Minimum “ON”
Resistance
(Note 5)
V
CTL
=
V
IH
,
I
S
=
2.0 mA
V
IS
=
V
CC
to V
EE
(
Figure 1
)
V
CTL
=
V
IH
,
I
S
=
2.0 mA
V
IS
=
V
CC
or V
EE
(
Figure 1
)
R
ON
Maximum “ON”
Resistance
Matching
I
IN
I
IZ
Maximum Control
Input Current
Maximum Switch
“OFF” Leakage
Current
I
IZ
Maximum Switch
“ON” Leakage
Current
I
CC
Maximum Quiescent
Supply Current
V
OS
=
V
CC
or V
EE
V
IS
=
V
EE
or V
CC
V
CTL
=
V
IL
(
Figure 2
)
V
IS
=
V
CC
to V
EE
V
CTL
=
V
IH
,
V
OS
=
OPEN
(
Figure 3
)
V
IN
=
V
CC
or GND
I
OUT
=
0
µA
V
IN
=
V
CC
or GND
V
CTL
=
V
IH
V
IS
=
V
CC
to V
EE
Conditions
(Note 4)
V
EE
V
CC
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
GND
−4.5V
−6.0V
GND
GND
−4.5V
−6.0V
GND
−4.5V
−6.0V
GND
4.5V
4.5V
6.0V
2.0V
4.5V
4.5V
6.0V
4.5V
4.5V
6.0V
6.0V
100
40
30
100
40
50
20
10
5
5
T
A
=
25°C
Typ
1.5
3.15
4.2
0.5
1.35
1.8
170
85
70
180
80
60
40
15
10
10
±0.1
T
A
= −40°C
to
+85°C
Guaranteed Limits
1.5
3.15
4.2
0.5
1.35
1.8
200
105
85
215
100
75
60
20
15
15
±1.0
µA
Ω
Ω
V
V
Units
GND
−6.0V
6.0V
6.0V
±30
±50
±300
±500
nA
GND
−6.0V
GND
−6.0V
6.0V
6.0V
6.0V
6.0V
±20
±30
1.0
4.0
±75
±150
10
40
nA
µA
Note 4:
For a power supply of 5V
±10%
the worst case on resistances (R
ON
) occurs for VHC at 4.5V. Thus the 4.5V values should be used when designing
with this supply. Worst case V
IH
and V
IL
occur at V
CC
=
5.5V and 4.5V respectively. (The V
IH
value at 5.5V is 3.85V.) The worst case leakage current occurs
for CMOS at the higher voltage and so the 5.5V values should be used.
Note 5:
At supply voltages (V
CC
–V
EE
) approaching 2V the analog switch on resistance becomes extremely non-linear. Therefore it is recommended that
these devices be used to transmit digital only when using these supply voltages.
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2
74VHC4316
AC Electrical Characteristics
V
CC
=
2.0V
−
6.0V, V
EE
=
0V
−
6V, C
L
=
50 pF unless otherwise specified
Symbol
t
PHL
, t
PLH
Parameter
Maximum Propagation
Delay Switch In to
Out
t
PZL
, t
PZH
Maximum Switch Turn
“ON” Delay
(Control)
t
PHZ
, t
PLZ
Maximum Switch Turn
“OFF” Delay
(Control)
t
PZL
, t
PZH
Maximum Switch
Turn “ON” Delay
(Enable)
t
PLZ
, t
PHZ
Maximum Switch
Turn “OFF” Delay
(Enable)
Minimum Frequency
Response (
Figure 7
)
20 log (V
OS
/V
IS
)=
−3
dB
Control to Switch
Feedthrough Noise
(
Figure 8
)
Crosstalk Between
any Two Switches
(
Figure 9
)
Switch OFF Signal
Feedthrough
Isolation
(
Figure 10
)
THD
Sinewave Harmonic
Distortion
(
Figure 11
)
C
IN
C
IN
C
IN
C
PD
Maximum Control
Input Capacitance
Maximum Switch
Input Capacitance
Maximum Feedthrough
Capacitance
Power Dissipation
Capacitance
Note 6:
Adjust 0 dBm for f
=
1 kHz (Null R
L
/Ron Attenuation).
Note 7:
V
IS
is centered at V
CC
–V
EE
/2.
Note 8:
Adjust for 0 dBm.
Conditions
V
EE
GND
GND
−4.5V
−6.0V
V
CC
3.3V
4.5V
4.5V
6.0V
3.3V
4.5V
4.5V
6.0V
3.3V
4.5V
4.5V
6.0V
3.3V
4.5V
4.5V
6.0V
3.3V
4.5V
4.5V
6.0V
4.5
4.5V
4.5V
4.5V
4.5V
4.5V
T
A
=+25°C
Typ
15
5
4
3
25
20
15
14
35
25
20
20
27
20
19
18
42
28
23
21
40
100
100
250
−52
−50
30
10
8
7
97
35
32
30
145
50
44
44
120
41
38
36
155
53
47
47
T
A
=−40°C
to
+85°C
Guaranteed Limits
37
13
12
11
120
43
39
37
180
63
55
55
150
52
48
45
190
67
59
59
Units
ns
R
L
=
1 kΩ
GND
GND
−4.5V
−6.0V
ns
R
L
=
1 kΩ
GND
GND
−4.5V
−6.0V
GND
GND
−4.5V
−6.0V
GND
GND
−4.5V
−6.0V
ns
ns
ns
R
L
=
600Ω, V
IS
=
2V
PP
at (V
CC
–V
EE
/2)
(Note 6)(Note 7)
R
L
=
600Ω, f
=
1 MHz
C
L
=
50 pF
(Note 7)(Note 8)
R
L
=
600Ω, f
=
1 MHz
0V
−4.5V
0V
−4.5V
0V
−4.5V
MHz
mV
dB
R
L
=
600Ω, f
=
1 MHz
V
CTL
=
V
IL
(Note 7)(Note 8)
R
L
=
10 KΩ, C
L
=
50 pF,
f
=
1 KHz
V
IS
=
4 V
PP
V
IS
=
8 V
PP
0V
−4.5V
4.5V
4.5V
0.013
0.008
5
35
V
CTL
=
GND
0.5
15
pF
pF
pF
pF
%
0V
−4.5V
4.5V
4.5V
−42
−44
dB
3
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74VHC4316
AC Test Circuits and Switching Time Waveforms
FIGURE 1. “ON” Resistance
FIGURE 2. “OFF” Channel Leakage Current
FIGURE 3. “ON” Channel Leakage Current
FIGURE 4. t
PHL
, t
PLH
Propagation Delay Time Signal Input to Signal Output
FIGURE 5. t
PZL
, t
PLZ
Propagation Delay Time Control to Signal Output
FIGURE 6. t
PZH
, t
PHZ
Propagation Delay Time Control to Signal Output
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4
74VHC4316
AC Test Circuits and Switching Time Waveforms
(Continued)
FIGURE 7. Frequency Response
FIGURE 8. Crosstalk: Control Input to Signal Output
FIGURE 9. Crosstalk between Any Two Switches
FIGURE 10. Switch OFF Signal Feedthrough Isolation
FIGURE 11. Sinewave Distortion
5
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