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“Standard”:
2.
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DATA SHEET
SILICON TRANSISTORS
2SA1221, 1222
PNP SILICON EPITAXIAL TRANSISTOR
FOR LOW-FREQUENCY POWER AMPLIFIERS
FEATURES
• Ideal for use of high withstanding voltage current such as TV
vertical deflection output, audio output, and variable power
supplies.
• Complementary transistor with 2SC2958 and 2SC2959
V
CEO
= 140 V: 2SA1221/2SC2958
V
CEO
= 160 V: 2SA1222/2SC2959
PACKAGE DRAWING (UNIT: mm)
ABSOLUTE MAXIMUM RATINGS (Ta = 25°C)
°
Parameter
Collector to base voltage
Collector to emitter voltage
Emitter to base voltage
Collector current (DC)
Collector current (pulse)
Total power dissipation
Junction temperature
Storage temperature
Symbol
V
CBO
V
CEO
V
EBO
I
C(DC)
I
C(pulse)
*
P
T
T
j
T
stg
Ratings
−160
−140/–160
−5.0
−500
−1.0
1.0
150
−55
to +150
Unit
V
V
V
mA
A
W
°C
°C
* PW
≤
10 ms, duty cycle
≤
50%
ELECTRICAL CHARACTERISTICS (Ta = 25°C)
°
Parameter
Collector cutoff current
Emitter cutoff current
DC current gain
DC base voltage
Collector saturation voltage
Base saturation voltage
Output capacitance
Gain bandwidth product
Symbol
I
CBO
I
EBO
h
FE
**
V
BE
**
V
CE(sat)
**
V
BE(sat)
**
C
ob
f
T
Conditions
V
CB
=
−100
V, I
E
= 0
V
EB
=
−5.0
V, I
C
= 0
V
CE
=
−2.0
V, I
C
=
−100
mA
V
CE
=
−5.0
V, I
C
=
−20
mA
I
C
=
−1.0
A, I
B
=
−0.2
A
I
C
=
−1.0
A, I
B
=
−0.2
A
V
CB
=
−10
V, I
E
= 0, f = 1.0 MHz
V
CE
=
−10
V, I
E
= 20 mA
30
100
−0.6
150
−0.64
−0.6
−1.1
24
45
MIN.
TYP.
MAX.
−200
−200
400
−0.7
−0.9
−0.3
40
V
V
V
pF
MHz
Unit
nA
nA
** Pulse test PW
≤
350
µ
s, duty cycle
≤
2% per pulsed
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D16143EJ1V0DS00
Date Published April 2002 N CP(K)
Printed in Japan
©
2002
1998
Embedded System
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