Ordering number : ENA0413
LC87F75C8A
Overview
CMOS IC
FROM 128K byte, RAM 4096 byte on-chip
8-bit 1-chip Microcontroller
The SANYO LC87F75C8A is an 8-bit microcomputer that, centered around a CPU running at a minimum bus cycle time
of 83.3ns, integrates on a single chip a number of hardware features such as 128K-byte flash ROM (onboard
programmable), 4096-byte RAM, an on-chip debugger, a LCD controller/driver, sophisticated 16-bit timer/counter (may
be divided into 8-bit timers), a 16-bit timer/counter (may be divided into 8-bit timers/counters or 8-bit PWMs), four 8-bit
timers with a prescaler, a 16-bit timer with a prescaler (may be divided into 8-bit timers), a base timer serving as a time-
of-day clock, a day and time counter, a synchronous SIO interface (with automatic block transmission/reception
capabilities), an asynchronous/synchronous SIO interface, a UART interface (full duplex), an 8-bit 15-channel AD
converter, two 12-bit PWM channels, a high-speed clock counter, a system clock frequency divider, a small signal
detector, ROM correction function, remote control receive function, and a 28-source 10-vector interrupt feature.
Features
Flash ROM
•
Capable of on-board-programming with wide range, 3.0 to 5.5V, of voltage source.
•
Block-erasable in 128-byte units
•
131072
×
8 bits (LC87F75C8A)
RAM
•
4096
×
9 bits (LC87F75C8A)
Minimum Bus Cycle Time
•
83.3ns (12MHz)
VDD=3.0 to 5.5V
•
125ns (8MHz)
VDD=2.5 to 3.0V
•
250ns (4MHz)
VDD=2.2 to 2.5V
Note: The bus cycle time here refers to the ROM read speed.
Minimum Instruction Cycle Time (tCYC)
•
250ns (12MHz)
VDD=3.0 to 5.5V
•
375ns (8MHz)
VDD=2.5 to 3.0V
•
750ns (4MHz)
VDD=2.2 to 2.5V
* This production is produced and sold by SANYO under license of the Silicon Storage Technology Inc.
Specifications and information herein are subject to change without notice.
Any and all SANYO Semiconductor products described or contained herein do not have specifications
that can handle applications that require extremely high levels of reliability, such as life-support systems,
aircraft's control systems, or other applications whose failure can be reasonably expected to result in
serious physical and/or material damage. Consult with your SANYO Semiconductor representative
nearest you before usingany SANYO Semiconductor products described or contained herein in such
applications.
SANYO Semiconductor assumes no responsibility for equipment failures that result from using products
at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor
products described or contained herein.
Ver.1.01
N0106HKIM B8-9234 No.A0413-1/26
LC87F75C8A
Ports
•
Normal withstand voltage I/O ports
Ports whose I/O direction can be designated in 1 bit units 27 (P1n, P30 to P35, P70 to P73, P8n, XT2)
Ports whose I/O direction can be designated in 4 bit units 8 (P0n)
(When N-channel open drain output is selected, data can be input in bit units.)
•
Normal withstand voltage input port
1 (XT1)
•
LCD ports
Segment output
48 (S00 to S47)
Common output
4 (COM0 to COM3)
Bias terminals for LCD driver
3 (V1 to V3)
Other functions
Input/output ports
48 (PAn, PBn, PCn, PDn, PEn, PFn,)
Input ports
7 (PLn)
•
Dedicated oscillator ports
2 (CF1, CF2)
•
Reset pin
1 (RES)
•
Power pins
6 (VSS1 to VSS3, VDD1 to VDD3)
LCD Controller
1) Seven display modes are available (static, 1/2, 1/3, 1/4 duty
×
1/2, 1/3 bias)
2) Segment output and common output can be switched to general-purpose input/output ports
Small Signal Detection (MIC signals etc)
1) Counts pulses with the level which is greater than a preset value
2) 2-bit counter
Timers
•
Timer 0: 16-bit timer/counter with two capture registers.
Mode 0: 8-bit timer with an 8-bit programmable prescaler (with two 8-bit capture registers)
×
2 channels
Mode 1: 8-bit timer with an 8-bit programmable prescaler (with two 8-bit capture registers)
+ 8-bit counter (with two 8-bit capture registers)
Mode 2: 16-bit timer with an 8-bit programmable prescaler (with two 16-bit capture registers)
Mode 3: 16-bit counter (with two 16-bit capture registers)
•
Timer 1: 16-bit timer/counter that supports PWM/toggle outputs
Mode 0: 8-bit timer with an 8-bit prescaler (with toggle outputs)
+ 8-bit timer/counter with an 8-bit prescaler (with toggle outputs)
Mode 1: 8-bit PWM with an 8-bit prescaler
×
2 channels
Mode 2: 16-bit timer/counter with an 8-bit prescaler (with toggle outputs)
(toggle outputs also possible from the lower-order 8 bits)
Mode 3: 16-bit timer with an 8-bit prescaler (with toggle outputs)
(The lower-order 8 bits can be used as PWM.)
•
Timer 4: 8-bit timer with a 6-bit prescaler
•
Timer 5: 8-bit timer with a 6-bit prescaler
•
Timer 6: 8-bit timer with a 6-bit prescaler (with toggle output)
•
Timer 7: 8-bit timer with a 6-bit prescaler (with toggle output)
•
Timer 8: 16-bit timer
Mode 0: 8-bit timer with an 8-bit prescaler
×
2 channels (with toggle output)
Mode 1: 16-bit timer with an 8-bit prescaler (with toggle output)
•
Base timer
1) The clock is selectable from the subclock (32.768kHz crystal oscillation), system clock,
and timer 0 prescaler output.
2) Interrupts programmable in 5 different time schemes
•
Day and time counter
1) Using with a base timer, it can be used as 65000 day + minute + second counter.
High-speed Clock Counter
1) Can count clocks with a maximum clock rate of 20MHz (at a main clock of 10MHz).
2) Can generate output real-time.
No.A0413-2/26
LC87F75C8A
SIO
•
SIO0: 8-bit synchronous serial interface
1) LSB first/MSB first mode selectable
2) Built-in 8-bit baudrate generator (maximum transfer clock cycle = 4/3 tCYC)
3) Automatic continuous data transmission (1 to 256 bits specifiable in 1-bit units, suspension and resumption of
data transmission possible in 1-byte units)
•
SIO1: 8-bit asynchronous/synchronous serial interface
Mode 0: Synchronous 8-bit serial I/O (2- or 3-wire configuration, 2 to 512 tCYC transfer clocks)
Mode 1: Asynchronous serial I/O (half-duplex, 8-data bits, 1-stop bit, 8 to 2048 tCYC baudrates)
Mode 2: Bus mode 1 (start bit, 8-data bits, 2 to 512 tCYC transfer clocks)
Mode 3: Bus mode 2 (start detect, 8-data bits, stop detect)
UART
•
Full duplex
•
7/8/9 bit data bits selectable
•
1 stop bit (2-bit in continuous data transmission)
•
Built-in baudrate generator
AD Converter: 8 bits
×
15 channels
PWM: Multi frequency 12-bit PWM
×
2 channels
Remote Control Receiver Circuit (sharing pins with P73/INT3/T0IN/RMIN)
1) Noise rejection function
(Units of noise rejection filter: about 120µs, when selecting a 32.768kHz crystal oscillator as a clock.)
2) Supporting reception formats with a guide-pulse of half-clock/clock/none.
3) Determines a end of reception by detecting a no-signal periods (No carrier).
(Supports same reception format with a different bit length.)
4) X’tal HOLD mode release function
Watchdog Timer
•
External RC watchdog timer
•
Interrupt and reset signals selectable
Clock Output Function
1) Able to output selected oscillation clock 1/1, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64 as system clock.
2) Able to output oscillation clock of sub clock.
No.A0413-3/26
LC87F75C8A
Interrupts
•
28 sources, 10 vector addresses
1) Provides three levels (low (L), high (H), and highest (X)) of multiplex interrupt control. Any interrupt requests of
the level equal to or lower than the current interrupt are not accepted.
2) When interrupt requests to two or more vector addresses occur at the same time, the interrupt of the highest level
takes precedence over the other interrupts. For interrupts of the same level, the interrupt into the smallest vector
address takes precedence.
No.
1
2
3
4
5
6
7
8
9
10
Vector Address
00003H
0000BH
00013H
0001BH
00023H
0002BH
00033H
0003BH
00043H
0004BH
Level
X or L
X or L
H or L
H or L
H or L
H or L
H or L
H or L
H or L
H or L
INT0
INT1
INT2/T0L/INT4/remote control receiver
INT3/base timer/INT5
T0H/INT6
T1L/T1H/INT7
SIO0/UART1 receive/T8L/T8H
SIO1/UART1 transmit
ADC/MIC/T6/T7/PWM4, 5
Port 0/T4/T5
Interrupt Source
•
Priority levels X
>
H
>
L
•
Of interrupts of the same level, the one with the smallest vector address takes precedence.
•
IFLG (List of interrupt source flag function)
1) Shows a list of interrupt source flags that caused a branching to a particular vector address
(shown in the diagram above).
Subroutine Stack Levels: 2048 levels (The stack is allocated in RAM.)
High-speed Multiplication/Division Instructions
•
16 bits
×
8 bits
(5 tCYC execution time)
•
24 bits
×
16 bits
(12 tCYC execution time)
•
16 bits
÷
8 bits
(8 tCYC execution time)
•
24 bits
÷
16 bits
(12 tCYC execution time)
Oscillation Circuits
•
RC oscillation circuit (internal):
For system clock
•
CF oscillation circuit:
For system clock, with internal Rf
•
Crystal oscillation circuit:
For low-speed system clock, with internal Rf
•
Frequency variable RC oscillation circuit (internal): For system clock
1) Adjustable in
±4%
(typ.) step from a selected center frequency.
2) Measures oscillation clock using a input signal from XT1 as a reference.
System Clock Divider Function
•
Can run on low current.
•
The minimum instruction cycle selectable from 300ns, 600ns, 1.2µs, 2.4µs, 4.8µs, 9.6µs, 19.2µs, 38.4µs,
and 76.8µs (at a main clock rate of 10MHz).
No.A0413-4/26
LC87F75C8A
Standby Function
•
HALT mode: Halts instruction execution while allowing the peripheral circuits to continue operation.
(Some parts of the serial transfer function stops operation.)
1) Oscillation is not halted automatically.
2) Canceled by a system reset or occurrence of an interrupt
•
HOLD mode: Suspends instruction execution and the operation of the peripheral circuits.
1) The CF, RC, X’tal, and frequency variable RC oscillators automatically stop operation.
2) There are three ways of resetting the HOLD mode.
(1) Setting the reset pin to the low level
(2) Setting at least one of the INT0, INT1, INT2, INT4, and INT5 pins to the specified level
(3) Having an interrupt source established at port 0
•
X'tal HOLD mode: Suspends instruction execution and the operation of the peripheral circuits except the base timer
and the remote control receiver circuit.
1) The CF, RC, and frequency variable RC oscillators automatically stop operation.
2) The state of crystal oscillation established when the X'tal HOLD mode is entered is retained.
3) There are five ways of resetting the X'tal HOLD mode.
(1) Setting the reset pin to the low level
(2) Setting at least one of the INT0, INT1, INT2, INT4, and INT5 pins to the specified level
(3) Having an interrupt source established at port 0
(4) Having an interrupt source established in the base timer circuit
(5) Having an interrupt source established in the remote control receiver circuit
ROM Correction Function
•
Executes the correction program on detection of a match with the program counter value.
•
Correction program area size: 128 bytes
On-chip Debugger
•
Supports software debugging with the IC mounted on the target board.
Package Form
•
QIP100E(14×20):
•
TQFP100(14×14):
Lead-free type
Lead-free type
Development Tools
•
On-chip debugger: TCB87-TypeA or TCB87-TypeB + LC87F75C8A
Flash ROM Programming Boards
Package
QIP100E(14×20)
TQFP100(14×14)
Programming boards
W87FQ100
W87FSQ100
Flash ROM Programmer
Maker
Single
Flash Support Group, Inc.
(Formerly Ando Electric Co., Ltd.)
Gang
Model
AF9708/AF9709/
AF9709B
AF9723 (Main body)
AF9833 (Unit)
SANYO
SKK (SANYO FWS)
Supported version (Note)
After 02.35
After 02.04
After 01.83
After 1.02A
LC87F75C8A
LC87F5JC8A FAST
Device
Note: Please check the latest version.
Same Package and Pin Assignment as Mask ROM Version.
1) LC877500 series options can be set by using flash ROM data. Thus the board used for mass production can be
used for debugging and evaluation without modifications.
2) If the program for the mask ROM version is used, the usable ROM/RAM capacity is the same as the mask ROM
version.
No.A0413-5/26
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