long timer circuit
Source: InternetPublisher:zht24 Updated: 2017/03/17
This timer circuit provides a 20min timing delay. It is a standard damping oscillator with a FET current source. Resistor R1 is used to provide reverse offset on the JFET's gate-to-power transition. This turns off the JFET and increases C1's charging time. C1 should be a low leakage capacitor like polyester resin.
![长时间计时器电路](http://www.eeworld.com.cn/circuit/upload/538a1bc8a409ff500dc8e0cb6c6d7ecb/4f4d1088-3c63-11ec-86db-086126841eb8.jpg)
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