IDT74ALVCHR162601PA datasheet, PDF

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IDT74ALVCHR162601PA: DescriptionRegistered Bus Transceiver, ALVC/VCX/A Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, 0.50 MM PITCH, TSSOP-56; Categorylogic logic; File Size133KB，7 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT74ALVCHR162601PA Overview

Registered Bus Transceiver, ALVC/VCX/A Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, 0.50 MM PITCH, TSSOP-56

IDT74ALVCHR162601PA Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	TSSOP
package instruction	TSSOP, TSSOP56,.3,20
Contacts	56
Reach Compliance Code	not_compliant
Other features	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
Control type	INDEPENDENT CONTROL
Counting direction	BIDIRECTIONAL
series	ALVC/VCX/A
JESD-30 code	R-PDSO-G56
JESD-609 code	e0
length	14 mm
Logic integrated circuit type	REGISTERED BUS TRANSCEIVER
MaximumI(ol)	0.012 A
Humidity sensitivity level	1
Number of digits	18
Number of functions	1
Number of ports	2
Number of terminals	56
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE WITH SERIES RESISTOR
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP56,.3,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
power supply	3.3 V
Prop。Delay @ Nom-Sup	4.4 ns
propagation delay (tpd)	6.3 ns
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
translate	N/A
Trigger type	POSITIVE EDGE
width	6.1 mm
Base Number Matches	1

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IDT74ALVCHR162601

3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER

EXTENDED COMMERCIAL TEMPERATURE RANGE

3.3V CMOS 18-BIT

IDT74ALVCHR162601

UNIVERSAL BUS

TRANSCEIVER WITH 3-STATE

OUTPUTS AND BUS-HOLD

FEATURES:

0.5 MICRON CMOS Technology

Typical t

SK(0)

(Output Skew) < 250ps

ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

– 0.635mm pitch SSOP, 0.50mm pitch TSSOP,

and 0.40mm pitch TVSOP packages

– Extended commercial range of – 40°C to + 85°C

– V

= 3.3V ± 0.3V, Normal Range

– V

= 2.7V to 3.6V, Extended Range

– V

= 2.5V ± 0.2V

– CMOS power levels (0.4µ W typ. static)

– Rail-to-Rail output swing for increased noise margin

Drive Features for ALVCHR162601:

– Balanced Output Drivers: ±12mA

– Low switching noise

–

CMOS technology. The transceiver combines D-type latches and D-type

flip-flops to allow data flow in transparent, latched, and clocked modes.

Data flow in each direction is controlled by output-enable (OEAB and

OEBA),

latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA)

inputs. The clock can be controlled by the clock-enable (CLKENAB and

CLKENBA)

inputs. For A-to-B data flow, the device operates in the

transparent mode when LEAB is high. When LEAB is low, the A data is

latched if CLKAB is held at a high or low logic level. If LEAB is low, the data

is stored in the latch/flip-flop on the low-to-high transition of CLKAB. Output

enable

OEAB

is active low. When

OEAB

is low, the outputs are active. When

OEAB

is high, the outputs are in the high-impedance state.

Data flow for B to A is similar to that of A to B but uses

OEBA,

LEBA, CLKBA

and

CLKENBA.

The ALVCHR162601 has series resistors in the device output structure

which will significantly reduce line noise when used with light loads. This

driver has been designed to drive

12mA at the designated threshold

levels.

The ALVCHR162601 has “bus-hold” which retains the inputs’ last state

whenever the input goes to a high impedance. This prevents floating inputs

and eliminates the need for pull-up/down resistors.

APPLICATIONS:

• 3.3V High Speed Systems

• 3.3V and lower voltage computing systems

DESCRIPTION:

This 18-bit universal bus transceiver is built using advanced dual metal

Functional Block Diagram

OEAB

CLKENAB

CLKAB

LEAB

LEBA

CLKBA

CLKENBA

OEBA

CLK

TO 17 OTHER CHANNELS

EXTENDED COMMERCIAL TEMPERATURE RANGE

1999 Integrated Device Technology, Inc.

MARCH 1999

DSC-4491/1

IDT74ALVCHR162601PA Related Products

	IDT74ALVCHR162601PA	IDT74ALVCHR162601PF	IDT74ALVCHR162601PV
Description	Registered Bus Transceiver, ALVC/VCX/A Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, 0.50 MM PITCH, TSSOP-56	Registered Bus Transceiver, ALVC/VCX/A Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, 0.40 MM PITCH, TVSOP-56	Registered Bus Transceiver, ALVC/VCX/A Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, 0.635 MM PITCH, SSOP-56
Is it Rohs certified?	incompatible	incompatible	incompatible
Parts packaging code	TSSOP	SSOP	SSOP
package instruction	TSSOP, TSSOP56,.3,20	TSSOP, TSSOP56,.25,16	SSOP, SSOP56,.4
Contacts	56	56	56
Reach Compliance Code	not_compliant	not_compliant	not_compliant
Other features	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
Control type	INDEPENDENT CONTROL	INDEPENDENT CONTROL	INDEPENDENT CONTROL
Counting direction	BIDIRECTIONAL	BIDIRECTIONAL	BIDIRECTIONAL
series	ALVC/VCX/A	ALVC/VCX/A	ALVC/VCX/A
JESD-30 code	R-PDSO-G56	R-PDSO-G56	R-PDSO-G56
JESD-609 code	e0	e0	e0
length	14 mm	11.3 mm	18.415 mm
Logic integrated circuit type	REGISTERED BUS TRANSCEIVER	REGISTERED BUS TRANSCEIVER	REGISTERED BUS TRANSCEIVER
MaximumI(ol)	0.012 A	0.012 A	0.012 A
Humidity sensitivity level	1	1	1
Number of digits	18	18	18
Number of functions	1	1	1
Number of ports	2	2	2
Number of terminals	56	56	56
Maximum operating temperature	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C
Output characteristics	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR
Output polarity	TRUE	TRUE	TRUE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	TSSOP	SSOP
Encapsulate equivalent code	TSSOP56,.3,20	TSSOP56,.25,16	SSOP56,.4
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH
power supply	3.3 V	3.3 V	3.3 V
Prop。Delay @ Nom-Sup	4.4 ns	4.4 ns	4.4 ns
propagation delay (tpd)	6.3 ns	6.3 ns	6.3 ns
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.2 mm	1.2 mm	2.794 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	2.3 V	2.3 V	2.3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING	GULL WING	GULL WING
Terminal pitch	0.5 mm	0.4 mm	0.635 mm
Terminal location	DUAL	DUAL	DUAL
translate	N/A	N/A	N/A
Trigger type	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
width	6.1 mm	4.4 mm	7.5 mm
Maker	-	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)

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