DP8408AN datasheet, PDF - EEWORLD Datasheet

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DP8408AN: DescriptionIC 64K X 1, DRAM CONTROLLER, PDIP48, 0.600 INCH, PLASTIC, DIP-48, Memory Controller; CategoryThe embedded processor and controller Microcontrollers and processors; File Size694KB，18 Pages; ManufacturerNational Semiconductor（TI ）; Websitehttp://www.ti.com

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DP8408AN Overview

IC 64K X 1, DRAM CONTROLLER, PDIP48, 0.600 INCH, PLASTIC, DIP-48, Memory Controller

DP8408AN Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
package instruction	0.600 INCH, PLASTIC, DIP-48
Reach Compliance Code	unknown
Address bus width	16
boundary scan	NO
External data bus width
JESD-30 code	R-PDIP-T48
JESD-609 code	e0
length	61.38 mm
low power mode	NO
memory organization	64K X 1
Number of blocks	4
Number of terminals	48
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP48,.6
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum slew rate	285 mA
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	NO
technology	MOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	15.24 mm
uPs/uCs/peripheral integrated circuit type	MEMORY CONTROLLER, DRAM
Base Number Matches	1

DP8408AN Related Products

	DP8408AN	DP8408AD	DP8408AN-3
Description	IC 64K X 1, DRAM CONTROLLER, PDIP48, 0.600 INCH, PLASTIC, DIP-48, Memory Controller	IC 64K X 1, DRAM CONTROLLER, CDIP48, SIDE BRAZED, CERAMIC, DIP-48, Memory Controller	IC 64K X 1, DRAM CONTROLLER, PDIP48, 0.600 INCH, PLASTIC, DIP-48, Memory Controller
Is it Rohs certified?	incompatible	incompatible	incompatible
package instruction	0.600 INCH, PLASTIC, DIP-48	SIDE BRAZED, CERAMIC, DIP-48	DIP, DIP48,.6
Reach Compliance Code	unknown	unknown	unknown
Address bus width	16	16	16
boundary scan	NO	NO	NO
JESD-30 code	R-PDIP-T48	R-CDIP-T48	R-PDIP-T48
JESD-609 code	e0	e0	e0
low power mode	NO	NO	NO
memory organization	64K X 1	64K X 1	64K X 1
Number of blocks	4	4	4
Number of terminals	48	48	48
Maximum operating temperature	70 °C	70 °C	70 °C
Package body material	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED	PLASTIC/EPOXY
encapsulated code	DIP	DIP	DIP
Encapsulate equivalent code	DIP48,.6	DIP48,.6	DIP48,.6
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	5 V	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	5.08 mm	5.08 mm	5.08 mm
Maximum slew rate	285 mA	285 mA	285 mA
Maximum supply voltage	5.25 V	5.25 V	5.25 V
Minimum supply voltage	4.75 V	4.75 V	4.75 V
Nominal supply voltage	5 V	5 V	5 V
surface mount	NO	NO	NO
technology	MOS	MOS	MOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	2.54 mm	2.54 mm	2.54 mm
Terminal location	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	15.24 mm	15.24 mm	15.24 mm
uPs/uCs/peripheral integrated circuit type	MEMORY CONTROLLER, DRAM	MEMORY CONTROLLER, DRAM	MEMORY CONTROLLER, DRAM
length	61.38 mm	-	61.38 mm
Base Number Matches	1	1	-
Maker	-	National Semiconductor（TI ）	National Semiconductor（TI ）

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