RN5VL52CTL datasheet, PDF - EEWORLD Datasheet

RN5VL52CTL: DescriptionPower Supply Support Circuit, Fixed, 1 Channel, CMOS, PDSO5, MINI, PLASTIC, SOT-23, 5 PIN; CategoryPower/power management The power supply circuit; File Size62KB，6 Pages; ManufacturerRICOH Electronic Devices Co., Ltd.

Download Datasheet Parametric View All

RN5VL52CTL Overview

Power Supply Support Circuit, Fixed, 1 Channel, CMOS, PDSO5, MINI, PLASTIC, SOT-23, 5 PIN

Parameter Name	Attribute value
Parts packaging code	SOT-23
package instruction	LSSOP,
Contacts	5
Reach Compliance Code	unknown
ECCN code	EAR99
Adjustable threshold	NO
Analog Integrated Circuits - Other Types	POWER SUPPLY SUPPORT CIRCUIT
JESD-30 code	R-PDSO-G5
length	2.9 mm
Number of channels	1
Number of functions	1
Number of terminals	5
Maximum operating temperature	80 °C
Minimum operating temperature	-30 °C
Package body material	PLASTIC/EPOXY
encapsulated code	LSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
Certification status	Not Qualified
Maximum seat height	1.3 mm
Maximum supply current (Isup)	0.0051 mA
Maximum supply voltage (Vsup)	10 V
Minimum supply voltage (Vsup)	1.5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL EXTENDED
Terminal form	GULL WING
Terminal pitch	0.95 mm
Terminal location	DUAL
width	1.6 mm
Base Number Matches	1

msp432 record 2-uart and display usage: The SDK explains it very clearly. It should be noted that the display can be output in different types. For now, we will use the serial port. You can also use LCD, Host, debug and other output types. ...; fish001 Microcontroller MCU

[EEWORLD 7th Community Star] September’s star is finally here (just released on November 3, still hot): First of all, I would like to apologize to everyone here for not announcing the results of the September celebrity selection. Mainly in order to allow celebrity netizens to get the best gifts, we are ...; EEWORLD社区 Suggestions & Announcements

Clock Constraint Problems in Real-Time Video Acquisition and Transmission System Based on FPGA: I am working on a video acquisition and transmission system based on FPGA. The board is DE2-115, the camera has 500W pixels, and it is programmed in VerilogHDL in Quratus II and downloaded to the boar...; 学堂猫猴子 FPGA/CPLD

[AB32VG1 Development Board Review] RTC Electronic Clock: [i=s]This post was last edited by jinglixixi on 2021-9-15 00:15[/i]AB32VG1 is equipped with an RTC timer. Using it to measure time can avoid the problem of base conversion in timing. Combining RTC wit...; jinglixixi Domestic Chip Exchange

Common digital circuit Verilog language expression: Level-sensitive 1-bit data latchmodule latch_1(q,d,clk); output q; input d,clk; assign q = clk ? d : q; //When the clock signal is high, latch the input dataendmodule 1 -bit data latch with set and re...; eeleader FPGA/CPLD

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components