STM8AF6199TCY datasheet, PDF - EEWORLD Datasheet

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STM8AF6199TCY: Description8-BIT, FLASH, 24MHz, MICROCONTROLLER, PQFP64, 10 X 10 MM, ROHS COMPLIANT, LQFP-64; CategoryThe embedded processor and controller Microcontrollers and processors; File Size850KB，112 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

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STM8AF6199TCY Overview

8-BIT, FLASH, 24MHz, MICROCONTROLLER, PQFP64, 10 X 10 MM, ROHS COMPLIANT, LQFP-64

STM8AF6199TCY Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Parts packaging code	QFP
package instruction	LFQFP, QFP64,.47SQ,20
Contacts	64
Reach Compliance Code	compliant
Has ADC	YES
bit size	8
boundary scan	NO
CPU series	STM8
maximum clock frequency	24 MHz
DAC channel	NO
DMA channel	NO
Format	FIXED-POINT
Integrated cache	NO
JESD-30 code	S-PQFP-G64
length	10 mm
low power mode	YES
Number of external interrupt devices	37
Number of I/O lines	56
Number of terminals	64
On-chip data RAM width	8
On-chip program ROM width	8
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Encapsulate equivalent code	QFP64,.47SQ,20
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Certification status	Not Qualified
RAM (bytes)	6144
RAM (number of words)	6144
rom(word)	98304
ROM programmability	FLASH
Maximum seat height	1.6 mm
speed	24 MHz
Maximum supply voltage	5.5 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
width	10 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER
Base Number Matches	1

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STM8AF61xx, STM8AF51xx

Automotive 8-bit MCU, with up to 128 Kbytes Flash, EEPROM,

10-bit ADC, timers, LIN, CAN, USART, SPI, I

C, 3 V to 5.5 V

Features

■

Core

– Max f

CPU

: 24 MHz

– Advanced STM8A core with Harvard

architecture and 3-stage pipeline

– Average 1.6 cycles/instruction resulting in

10 MIPS at 16 MHz f

CPU

for industry

standard benchmark

Memories

– Program memory: 32 to 128 Kbytes Flash;

data retention 20 years at 55 °C

– Data memory: up to 2 Kbytes true data

EEPROM; endurance 300 kcycles

– RAM: 2 Kbytes to 6 Kbytes

Clock management

– Low-power crystal resonator oscillator with

external clock input

– Internal, user-trimmable 16 MHz RC and

low-power 128 kHz RC oscillators

– Clock security system with clock monitor

Reset and supply management

– Multiple low-power modes (wait, slow, auto

wakeup, halt) with user definable clock

gating

– Low consumption power-on and

power-down reset

Interrupt management

– Nested interrupt controller with 32 interrupt

vectors

– Up to 37 external interrupts on 5 vectors

Timers

– 2 auto-reload 16-bit PWM timers with up to

3 CAPCOM channels each (IC, OC or

PWM)

– Multipurpose timer: 16-bit, 4 CAPCOM

channels, 3 complementary outputs, dead-

time insertion and flexible synchronization

– 8-bit AR system timer with 8-bit prescaler

– Auto wakeup timer

– Window and standard watchdog timers

Operating temperature up to 145 °C

LQFP48 7x7

LQFP80 14x14

LQFP32 7x7

LQFP64 10x10

■

Communication interfaces

– High speed 1 Mbit/s active CAN 2.0B

interface

– USART with clock output for synchronous

operation - LIN master mode

– LINUART LIN 2.1 compliant, master/slave

modes with automatic resynchronization

– SPI interface up to 10 Mbit/s or f

CPU

– I

C interface up to 400 Kbit/s

Analog to digital converter (ADC)

– 10-bit resolution, 2 LSB TUE, 1 LSB

linearity and up to 16 multiplexed channels

I/Os

– Up to 72 user pins including 10 high sink

I/Os

– Highly robust I/O design, immune against

current injection

Device summary

(1)

■

Table 1.

■

Part numbers: STM8AF61xx

STM8AF61AA, STM8AF61A9, STM8AF61A8,

STM8AF619A, STM8AF6199, STM8AF6198,

STM8AF618A, STM8AF6189, STM8AF6188,

STM8AF6186, STM8AF6179, STM8AF6178,

STM8AF6176, STM8AF6169

Part numbers: STM8AF51xx (CAN)

STM8AF51AA, STM8AF51A9, STM8AF51A8,

STM8AF519A, STM8AF5199, STM8AF5198,

STM8AF518A, STM8AF5189, STM8AF5188,

STM8AF5179, STM8AF5178, STM8AF5169,

STM8AF5168

1. This datasheet applies to product versions with and

without data EEPROM. Devices without EEPROM

carry the letter "H" instead of "F" in the order code.

■

October 2009

Doc ID 14395 Rev 5

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www.st.com

Contents

STM8AF61xx, STM8AH61xx, STM8AF51xx, STM8AH51xx

Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Product line-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Product features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.1

Central processing unit STM8A (CPU) . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.1.1

5.1.2

5.1.3

Architecture and registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Instruction set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.2

Non-volatile memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

5.2.1

5.2.2

5.2.3

5.2.4

Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Write protection (WP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Protection of user boot code (UBC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Read-out protection (ROP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5.3

Single wire interface module (SWIM) and debug module . . . . . . . . . . . . 16

5.3.1

5.3.2

SWIM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Debug module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5.4

Clock and clock controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5.4.1

5.4.2

5.4.3

5.4.4

5.4.5

5.4.6

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Internal 16 MHz RC oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Internal 128 kHz RC oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Internal high-speed crystal oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

External clock input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Clock security system (CSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

5.5

5.6

5.7

5.8

Low-power operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Interrupt controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Input/output specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

5.8.1

5.8.2

Watchdog timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Auto wakeup counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

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STM8AF61xx, STM8AH61xx, STM8AF51xx, STM8AH51xx

5.8.3

5.8.4

5.8.5

Contents

Beeper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Multipurpose and PWM timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

System timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

5.9

Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5.9.1

5.9.2

5.9.3

5.9.4

5.9.5

Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Inter integrated circuit (I

C) interface . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Universal synchronous/asynchronous receiver transmitter (USART) . . 23

Universal asynchronous receiver/transmitter with LIN support (LINUART)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Controller area network interface (CAN) . . . . . . . . . . . . . . . . . . . . . . . . 25

5.10

Analog to digital converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

6.1

6.2

Package pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

6.2.1

Alternate function remapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Interrupt table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

9.1

9.2

9.3

9.4

I/O register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Non volatile memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

CPU registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Miscellaneous registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

9.4.1

9.4.2

9.4.3

Global configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Reset status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Temporary memory unprotection key registers . . . . . . . . . . . . . . . . . . . 42

9.5

9.6

9.7

Clock and clock controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Low-power operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Interrupt controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

9.7.1

9.7.2

Interrupt software priority registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

External interrupt control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

9.8

Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

9.8.1

Window watchdog timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

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Contents

9.8.2

9.8.3

9.8.4

9.8.5

9.8.6

9.8.7

STM8AF61xx, STM8AH61xx, STM8AF51xx, STM8AH51xx

Independent watchdog timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Auto wakeup counter and beeper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

TIM1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

TIM2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

TIM3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

TIM4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

9.9

Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

9.9.1

9.9.2

9.9.3

9.9.4

9.9.5

Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Inter integrated circuit (I

C) interface . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Universal synchronous/asynchronous receiver transmitter (USART) . . 56

Universal asynchronous receiver/transmitter with LIN support (LINUART)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

9.10

Analog to digital converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Option bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

11.1

Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

11.1.1

11.1.2

11.1.3

11.1.4

11.1.5

Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

11.2

11.3

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

11.3.1

11.3.2

11.3.3

11.3.4

11.3.5

11.3.6

11.3.7

11.3.8

11.3.9

Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

External clock sources and timing characteristics . . . . . . . . . . . . . . . . . 75

Internal clock sources and timing characteristics . . . . . . . . . . . . . . . . . 77

Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

I/O port pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

Reset pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

TIM 1, 2, 3, and 4 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . 86

SPI interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

C interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

11.3.10 10-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

11.3.11 EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

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Doc ID 14395 Rev 5

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