Z86E142PZ016SG datasheet, PDF - EEWORLD Datasheet

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Z86E142PZ016SG: DescriptionIC 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PDIP40, DIP-40, Microcontroller; CategoryThe embedded processor and controller Microcontrollers and processors; File Size3MB，150 Pages; ManufacturerZilog, Inc.; Websitehttps://www.zilog.com/; Environmental Compliance

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Z86E142PZ016SG Overview

IC 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PDIP40, DIP-40, Microcontroller

Z86E142PZ016SG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Maker	Zilog, Inc.
Parts packaging code	DIP
package instruction	DIP,
Contacts	40
Reach Compliance Code	unknown
Has ADC	NO
Other features	ALSO OPERATES AT 5V SUPPLY
Address bus width	16
bit size	8
maximum clock frequency	16 MHz
DAC channel	NO
DMA channel	NO
External data bus width	8
JESD-30 code	R-PDIP-T40
JESD-609 code	e3
length	52.325 mm
Number of I/O lines	32
Number of terminals	40
Maximum operating temperature	70 °C
Minimum operating temperature
PWM channel	NO
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	225
Certification status	Not Qualified
ROM programmability	OTPROM
Maximum seat height	4.24 mm
speed	16 MHz
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	15.24 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER
Base Number Matches	1

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The MUZE Family of

Z8 Microcontrollers

AXIMUM

EMORY WITH

UART

AND

LOG E

XPANDABLE

EPROM

Product Speciﬁcation

PRELIMINARY

PS004005-1100

ZiLOG Worldwide Headquarters • 910 E. Hamilton Avenue • Campbell, CA 95008

Telephone: 408.558.8500 • Fax: 408.558.8300 •

www.ZiLOG.com

Z86E12X/Z86E13X/Z86E14X

The MUZE Family of Z8 Microcontrollers

iii

Table of Contents

Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

MUZE Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Expanded Register File, Bank 0h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

ASCI Registers—Expanded Register File, Bank Ah . . . . . . . . . . . . . . . . . .

Expanded Register File, Bank Fh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

AC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

Standard Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

One-Time Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

Universal Asynchronous Receiver/Transmitter . . . . . . . . . . . . . . . . . . . . . . . . 105

ASCI Key Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

ASCI Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

In-Circuit Serial Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125

In-Circuit Serial Programming Block Diagram . . . . . . . . . . . . . . . . . . . . . . 125

Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133

Part Number Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134

Precharacterization Product . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134

Document Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135

Document Number Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135

Change Log . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135

Customer Feedback Form . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MUZE Product Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Customer Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Product Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Return Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Problem Description or Suggestion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

136

PS004005-1100

P R E L I M I N A R Y

Z86E12X/Z86E13X/Z86E14X

The MUZE Family of Z8 Microcontrollers

List of Figures

Figure 1.

Figure 2.

Figure 3.

Figure 4.

Figure 5.

Figure 6.

Figure 7.

Figure 8.

Figure 9.

Figure 10.

Figure 11.

Figure 12.

Figure 13.

Figure 14.

Figure 15.

Figure 16.

Figure 17.

Figure 18.

Figure 19.

Figure 20.

Figure 21.

Figure 22.

Figure 23.

Figure 24.

Figure 25.

Figure 26.

Figure 27.

Figure 28.

Figure 29.

Figure 30.

Figure 31.

Figure 32.

Figure 33.

Figure 34.

MUZE Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

20-Pin DIP/SOIC Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 5

20-Pin DIP/SOIC Pin Configuration—ICSP Mode . . . . . . . . . . . . . . . 6

28-Pin DIP/SOIC Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 7

28-Pin DIP/SOIC Pin Configuration—ICSP Mode . . . . . . . . . . . . . . . 9

40-Pin DIP/SOIC Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . 11

40-Pin DIP/SOIC Pin Configuration—ICSP Mode . . . . . . . . . . . . . . 13

44-Pin PQFP Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

44-Pin PQFP Pin Configuration—ICSP Mode . . . . . . . . . . . . . . . . . 17

Port 0 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Port 1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Port 2 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Port 3 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Port 3 Configuration—PCON Register Detail . . . . . . . . . . . . . . . . . 27

Program Memory Map for the MUZE Family . . . . . . . . . . . . . . . . . . 30

Data Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Expanded Register File Architecture . . . . . . . . . . . . . . . . . . . . . . . . 35

Counter/Timer Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Oscillator Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Stop-Mode Recovery Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Resets and Watch-Dog Timer Example . . . . . . . . . . . . . . . . . . . . . 48

Typical Low-Voltage Protection vs. Temperature . . . . . . . . . . . . . . 49

Interrupt Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

External I/O or Memory Read and Write Timing . . . . . . . . . . . . . . . 86

Additional Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

Input Handshake Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

Output Handshake Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

Test Load Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

Receive Data Register FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

FIFO Overrun Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

Clear FIFO Overrun Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

ASCI Interface Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

ASCI Serial Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

PS004005-1100

P R E L I M I N A R Y

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