ICSVF2509BGLN datasheet, PDF - EEWORLD Datasheet

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ICSVF2509BGLN: DescriptionPLL Based Clock Driver, 2509 Series, 9 True Output(s), 0 Inverted Output(s), PDSO24, 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-24; Categorylogic logic; File Size151KB，9 Pages; ManufacturerIDT (Integrated Device Technology)

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ICSVF2509BGLN Overview

PLL Based Clock Driver, 2509 Series, 9 True Output(s), 0 Inverted Output(s), PDSO24, 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-24

ICSVF2509BGLN Parametric

Parameter Name	Attribute value
Maker	IDT (Integrated Device Technology)
Parts packaging code	TSSOP
package instruction	TSSOP,
Contacts	24
Reach Compliance Code	unknown
series	2509
Input adjustment	STANDARD
JESD-30 code	R-PDSO-G24
JESD-609 code	e3
length	7.8 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER
Number of functions	1
Number of inverted outputs
Number of terminals	24
Actual output times	9
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)	3.7 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.1 ns
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	3.63 V
Minimum supply voltage (Vsup)	2.97 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
Temperature level	COMMERCIAL
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
width	4.4 mm
minfmax	200 MHz
Base Number Matches	1

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Integrated

Circuit

Systems, Inc.

ICSVF2509B

3.3V Phase-Lock Loop Clock Driver

General Description

The

ICSVF2509B

is a high performance, low skew, low

jitter clock driver. It uses a phase lock loop (PLL) technology

to align, in both phase and frequency, the CLKIN signal

with the CLKOUT signal. It is specifically designed for use

with synchronous SDRAMs. The

ICSVF2509B

operates

at 3.3V VCC and drives up to nine clock loads.

One bank of five outputs and one bank of four outputs

provide nine low-skew, low-jitter copies of CLKIN. Output

signal duty cycles are adjusted to 50 percent, independent

of the duty cycle at CLKIN. Each bank of outputs can be

enabled or disabled separately via control (OEA and OEB)

inputs. When the OE inputs are high, the outputs align in

phase and frequency with CLKIN; when the OE inputs are

low, the outputs are disabled to the logic low state.

The

ICSVF2509B

does not require external RC filter

components. The loop filter for the PLL is included on-chip,

minimizing component count, board space, and cost. The

buffer mode shuts off the PLL and connects the input

directly to the output buffer. This buffer mode, the

ICSVF2509B

can be use as low skew fanout clock buffer

device. The

ICSVF2509B

comes in 24 pin 173mil Thin

Shrink Small-Outline package (TSSOP) package.

Features

•

Meets or exceeds PC133 registered DIMM

specification1.1

Spread Spectrum Clock Compatible

Distributes one clock input to one bank of ten outputs

Operating frequency 20MHz to 200MHz

External feedback input (FBIN) terminal is used to

synchrionize the outputs to the clock input

No external RC network required

Operates at 3.3V Vcc

Plastic 24-pin 173mil TSSOP package

Block Diagram

FBOUT

CLKA0

CLKA1

FBIN

CLKIN

PLL

CLKA2

CLKA3

AVCC

OEA

CLKB0

CLKB1

CLKB2

CLKB3

OEB

1036C— 07/13/05

Pin Configuration

AGND

VCC

CLKA0

CLKA1

CLKA2

GND

CLKA3

CLKA4

VCC

OEA

FBOUT

CLKIN

AVCC

VCC

CLKB0

CLKB1

GND

CLKB2

CLKB3

VCC

OEB

FBIN

CLKA4

24 Pin TSSOP

4.40 mm. Body, 0.65 mm. pitch

ICSVF2509B

ICSVF2509BGLN Related Products

	ICSVF2509BGLN	ICSVF2509BGLNT	ICSVF2509BGLN-T	ICSVF2509BG-T	ICSVF2509BGT	ICSVF2509BG
Description	PLL Based Clock Driver, 2509 Series, 9 True Output(s), 0 Inverted Output(s), PDSO24, 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-24	PLL Based Clock Driver, 2509 Series, 9 True Output(s), 0 Inverted Output(s), PDSO24, 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-24	Clock Driver	2509 SERIES, PLL BASED CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24, 4.40 MM, 0.65 MM PITCH, MO-153, TSSOP-24	PLL Based Clock Driver, 2509 Series, 9 True Output(s), 0 Inverted Output(s), PDSO24, 4.40 MM, 0.65 MM PITCH, MO-153, TSSOP-24	PLL Based Clock Driver, 2509 Series, 9 True Output(s), 0 Inverted Output(s), PDSO24, 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-24
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	TSSOP	TSSOP	TSSOP	TSSOP	TSSOP	TSSOP
package instruction	TSSOP,	4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-24	,	TSSOP,	TSSOP,	TSSOP,
Contacts	24	24	24	24	24	24
Reach Compliance Code	unknown	compliant	unknown	compliant	compliant	unknow
series	2509	2509	-	2509	2509	2509
Input adjustment	STANDARD	STANDARD	-	STANDARD	STANDARD	STANDARD
JESD-30 code	R-PDSO-G24	R-PDSO-G24	-	R-PDSO-G24	R-PDSO-G24	R-PDSO-G24
JESD-609 code	e3	e3	-	e0	e0	e3
length	7.8 mm	7.8 mm	-	7.8 mm	7.8 mm	7.8 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	-	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER
Number of functions	1	1	-	1	1	1
Number of terminals	24	24	-	24	24	24
Actual output times	9	9	-	9	9	9
Maximum operating temperature	70 °C	70 °C	-	70 °C	70 °C	70 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	TSSOP	-	TSSOP	TSSOP	TSSOP
Package shape	RECTANGULAR	RECTANGULAR	-	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	-	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)	3.7 ns	3.7 ns	-	3.7 ns	3.7 ns	3.7 ns
Certification status	Not Qualified	Not Qualified	-	Not Qualified	Not Qualified	Not Qualified
Same Edge Skew-Max（tskwd）	0.1 ns	0.1 ns	-	0.1 ns	0.1 ns	0.1 ns
Maximum seat height	1.2 mm	1.2 mm	-	1.2 mm	1.2 mm	1.2 mm
Maximum supply voltage (Vsup)	3.63 V	3.63 V	-	3.63 V	3.63 V	3.63 V
Minimum supply voltage (Vsup)	2.97 V	2.97 V	-	2.97 V	2.97 V	2.97 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	-	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	-	YES	YES	YES
Temperature level	COMMERCIAL	COMMERCIAL	-	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	MATTE TIN	Matte Tin (Sn) - annealed	-	TIN LEAD	Tin/Lead (Sn/Pb)	MATTE TIN
Terminal form	GULL WING	GULL WING	-	GULL WING	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.65 mm	-	0.65 mm	0.65 mm	0.65 mm
Terminal location	DUAL	DUAL	-	DUAL	DUAL	DUAL
width	4.4 mm	4.4 mm	-	4.4 mm	4.4 mm	4.4 mm
minfmax	200 MHz	200 MHz	-	200 MHz	200 MHz	200 MHz
Is it lead-free?	-	Lead free	Lead free	Contains lead	Contains lead	-

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