ICSVF2509BGT datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > logic> logic> ICSVF2509BGT

ICSVF2509BGT: DescriptionPLL Based Clock Driver, 2509 Series, 9 True Output(s), 0 Inverted Output(s), PDSO24, 4.40 MM, 0.65 MM PITCH, MO-153, TSSOP-24; Categorylogic logic; File Size151KB，9 Pages; ManufacturerIDT (Integrated Device Technology)

Download Datasheet Parametric Compare View All

ICSVF2509BGT Overview

PLL Based Clock Driver, 2509 Series, 9 True Output(s), 0 Inverted Output(s), PDSO24, 4.40 MM, 0.65 MM PITCH, MO-153, TSSOP-24

ICSVF2509BGT Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	TSSOP
package instruction	TSSOP,
Contacts	24
Reach Compliance Code	compliant
series	2509
Input adjustment	STANDARD
JESD-30 code	R-PDSO-G24
JESD-609 code	e0
length	7.8 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER
Number of functions	1
Number of inverted outputs
Number of terminals	24
Actual output times	9
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
propagation delay (tpd)	3.7 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.1 ns
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	3.63 V
Minimum supply voltage (Vsup)	2.97 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	4.4 mm
minfmax	200 MHz

Preview

Download Datasheet

View All

Integrated

Circuit

Systems, Inc.

ICSVF2509B

3.3V Phase-Lock Loop Clock Driver

General Description

The

ICSVF2509B

is a high performance, low skew, low

jitter clock driver. It uses a phase lock loop (PLL) technology

to align, in both phase and frequency, the CLKIN signal

with the CLKOUT signal. It is specifically designed for use

with synchronous SDRAMs. The

ICSVF2509B

operates

at 3.3V VCC and drives up to nine clock loads.

One bank of five outputs and one bank of four outputs

provide nine low-skew, low-jitter copies of CLKIN. Output

signal duty cycles are adjusted to 50 percent, independent

of the duty cycle at CLKIN. Each bank of outputs can be

enabled or disabled separately via control (OEA and OEB)

inputs. When the OE inputs are high, the outputs align in

phase and frequency with CLKIN; when the OE inputs are

low, the outputs are disabled to the logic low state.

The

ICSVF2509B

does not require external RC filter

components. The loop filter for the PLL is included on-chip,

minimizing component count, board space, and cost. The

buffer mode shuts off the PLL and connects the input

directly to the output buffer. This buffer mode, the

ICSVF2509B

can be use as low skew fanout clock buffer

device. The

ICSVF2509B

comes in 24 pin 173mil Thin

Shrink Small-Outline package (TSSOP) package.

Features

•

Meets or exceeds PC133 registered DIMM

specification1.1

Spread Spectrum Clock Compatible

Distributes one clock input to one bank of ten outputs

Operating frequency 20MHz to 200MHz

External feedback input (FBIN) terminal is used to

synchrionize the outputs to the clock input

No external RC network required

Operates at 3.3V Vcc

Plastic 24-pin 173mil TSSOP package

Block Diagram

FBOUT

CLKA0

CLKA1

FBIN

CLKIN

PLL

CLKA2

CLKA3

AVCC

OEA

CLKB0

CLKB1

CLKB2

CLKB3

OEB

1036C— 07/13/05

Pin Configuration

AGND

VCC

CLKA0

CLKA1

CLKA2

GND

CLKA3

CLKA4

VCC

OEA

FBOUT

CLKIN

AVCC

VCC

CLKB0

CLKB1

GND

CLKB2

CLKB3

VCC

OEB

FBIN

CLKA4

24 Pin TSSOP

4.40 mm. Body, 0.65 mm. pitch

ICSVF2509B

ICSVF2509BGT Related Products

	ICSVF2509BGT	ICSVF2509BGLNT	ICSVF2509BGLN-T	ICSVF2509BGLN	ICSVF2509BG-T	ICSVF2509BG
Description	PLL Based Clock Driver, 2509 Series, 9 True Output(s), 0 Inverted Output(s), PDSO24, 4.40 MM, 0.65 MM PITCH, MO-153, TSSOP-24	PLL Based Clock Driver, 2509 Series, 9 True Output(s), 0 Inverted Output(s), PDSO24, 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-24	Clock Driver	PLL Based Clock Driver, 2509 Series, 9 True Output(s), 0 Inverted Output(s), PDSO24, 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-24	2509 SERIES, PLL BASED CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24, 4.40 MM, 0.65 MM PITCH, MO-153, TSSOP-24	PLL Based Clock Driver, 2509 Series, 9 True Output(s), 0 Inverted Output(s), PDSO24, 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-24
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	TSSOP	TSSOP	TSSOP	TSSOP	TSSOP	TSSOP
package instruction	TSSOP,	4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-24	,	TSSOP,	TSSOP,	TSSOP,
Contacts	24	24	24	24	24	24
Reach Compliance Code	compliant	compliant	unknown	unknown	compliant	unknow
Is it lead-free?	Contains lead	Lead free	Lead free	-	Contains lead	-
series	2509	2509	-	2509	2509	2509
Input adjustment	STANDARD	STANDARD	-	STANDARD	STANDARD	STANDARD
JESD-30 code	R-PDSO-G24	R-PDSO-G24	-	R-PDSO-G24	R-PDSO-G24	R-PDSO-G24
JESD-609 code	e0	e3	-	e3	e0	e3
length	7.8 mm	7.8 mm	-	7.8 mm	7.8 mm	7.8 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	-	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER
Number of functions	1	1	-	1	1	1
Number of terminals	24	24	-	24	24	24
Actual output times	9	9	-	9	9	9
Maximum operating temperature	70 °C	70 °C	-	70 °C	70 °C	70 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	TSSOP	-	TSSOP	TSSOP	TSSOP
Package shape	RECTANGULAR	RECTANGULAR	-	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	-	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)	3.7 ns	3.7 ns	-	3.7 ns	3.7 ns	3.7 ns
Certification status	Not Qualified	Not Qualified	-	Not Qualified	Not Qualified	Not Qualified
Same Edge Skew-Max（tskwd）	0.1 ns	0.1 ns	-	0.1 ns	0.1 ns	0.1 ns
Maximum seat height	1.2 mm	1.2 mm	-	1.2 mm	1.2 mm	1.2 mm
Maximum supply voltage (Vsup)	3.63 V	3.63 V	-	3.63 V	3.63 V	3.63 V
Minimum supply voltage (Vsup)	2.97 V	2.97 V	-	2.97 V	2.97 V	2.97 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	-	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	-	YES	YES	YES
Temperature level	COMMERCIAL	COMMERCIAL	-	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Matte Tin (Sn) - annealed	-	MATTE TIN	TIN LEAD	MATTE TIN
Terminal form	GULL WING	GULL WING	-	GULL WING	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.65 mm	-	0.65 mm	0.65 mm	0.65 mm
Terminal location	DUAL	DUAL	-	DUAL	DUAL	DUAL
width	4.4 mm	4.4 mm	-	4.4 mm	4.4 mm	4.4 mm
minfmax	200 MHz	200 MHz	-	200 MHz	200 MHz	200 MHz

Recommended Resources

Integrated voltage regulator application circuit commonly used in automobiles 02

CW9300 series music integrated circuit

Bridge sensor transmit/receive circuit

heart rate monitor

Frost alarm circuit

Mamn-7 tube preamplifier circuit

How to connect AD acquisition converter MAX180 and microcomputer chip 8086: Does anyone know how to connect the AD acquisition converter MAX180 and the microcomputer chip 8086? Thank you...; 宋宋 Test/Measurement

【WIO Link Review】Unboxing: I received the legendary WIO Link a long time ago. I'm sorry that I only have time to play with this awesome IoT development board now. WIO Link is a new open source product that aims to make it easy ...; dql2016 RF/Wirelessly

430 Can exponential operations be performed?: 430 Can exponential operation be performed?If so, how can it be implemented? ?#includevoid main(void){dou××ei;i=exp(1.5);}But when I check the value of i from watch, it shows un××iala××e. What's going...; fangning Microcontroller MCU

A comprehensive analysis of key issues in LED lighting design: To design a product, we must first determine which LED package structure to use; then consider how to adapt to these packages; we have few options, and the optical structure is built on these packages...; 探路者 LED Zone

Both solutions for Topic E in 2007 won first prize (with pictures): [i=s]This post was last edited by paulhyde on 2014-9-15 04:00[/i]Design of Switching Voltage Regulator...; wllyj Electronics Design Contest

What should I use to replace the broken sym3107 on at5011?: What should I use to replace the broken sym3107 on at5011?...; ssawee Integrated technical exchanges

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components