NOT RECOMMENDED FOR NEW DESIGNS
RECOMMENDED REPLACEMENT PART
ZL6105
DATASHEET
FN6859
Rev 4.00
April 29, 2011
ZL2008
Digital DC/DC Controller with Drivers and Pin-Strap Current Sharing
The ZL2008 is a digital power controller with integrated
MOSFET drivers. Current sharing allows multiple devices to be
connected in parallel to source loads with very high current
demands. Adaptive performance optimization algorithms
improve power conversion efficiency. Zilker Labs Digital-DC™
technology enables a blend of power conversion performance
and power management features.
The ZL2008 is designed to be a flexible building block for DC
power and can be easily adapted to designs ranging from a
single-phase power supply operating from a 3.3V input to a
multi-phase supply operating from a 12V input. The ZL2008
eliminates the need for complicated power supply managers
as well as numerous external discrete components.
Key operating features can be configured by pin-straps,
including compensation, current sharing and output voltage.
The ZL2008 uses the I
2
C/SMBus™ with PMBus™ protocol for
communication with a host controller and the Digital-DC bus
for communication between Zilker Labs devices.
Features
Power Conversion
• Efficient synchronous buck controller
• Adaptive light load efficiency optimization
• 3V to 14V input range
• 0.54V to 5.5V output range (with margin)
• POLA and DOSA voltage trim modes
• ±1% output voltage accuracy
• Internal 3A MOSFET drivers
• Fast load transient response
• Current sharing and phase interleaving
•
Snapshot™
parameter capture
• RoHS compliant (6mmx6mm) QFN package
Applications
• Servers/storage equipment
• Telecom/datacom equipment
• Power supply modules
Power Management
• Digital soft-start/stop
• Precision delay and ramp-up
• Power good/enable
• Voltage tracking, sequencing and margining
• Voltage, current and temperature monitoring
• I
2
C/SMBus interface, PMBus compatible
• Output voltage and current protection
• Internal non-volatile memory (NVM)
Block Diagram
EN PG DLY
FC
ILIM CFG UVLO V25 VR VDD
Efficiency vs Load Current
100
95
V
OUT
= 3.3V
V
OUT
= 1.5V
90
POWER
MANAGEMENT
DRIVER
NON-
VOLATILE
MEMORY
BST
GH
SW
GL
VSEN+
VSEN-
ISENA
ISENB
Efficiency (%)
V
SS
VTRK
MGN
SYNC
DDC
LDO
85
80
75
70
65
60
55
50
0
V
IN
= 12V
f
SW
= 400kHz
Circuit of Figure 4
2
4
6
8
10
12
14
16
18
20
PWM
CONTROLLER
CURRENT
SENSE
TEMP
SENSOR
SCL
SDA
SALRT
I
2
C
MONITOR
ADC
SA
XTEMP
PGND SGND DGND
Load Current (A)
FIGURE 2. EFFICIENCY vs LOAD CURRENT
FIGURE 1. BLOCK DIAGRAM
FN6859 Rev 4.00
April 29, 2011
Page 1 of 43
ZL2008
Table of Contents
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended Operating Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical Specifications 4
Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Typical Application Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
ZL2008 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Digital-DC Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Conversion Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Management Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Multi-mode Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal Bias Regulators and Input Supply Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
High-side Driver Boost Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Voltage Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Start-up Procedure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Soft-start Delay and Ramp Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Good . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching Frequency and PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Train Component Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current Limit Threshold Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Loop Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Non-linear Response (NLR) Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Efficiency Optimized Driver Dead-time Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Adaptive Diode Emulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Adaptive Frequency Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
11
11
12
12
12
13
15
15
16
17
18
21
22
24
24
24
24
Power Conversion Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Power Management Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Input Undervoltage Lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Output Overvoltage Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Output Pre-Bias Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Output Overcurrent Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Thermal Overload Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Voltage Tracking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Voltage Margining . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
I2C/SMBus Communications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
I2C/SMBus Device Address Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Digital-DC Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Phase Spreading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Output Sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Fault Spreading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Temperature Monitoring Using the XTEMP Pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Active Current Sharing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Phase Adding/Dropping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Monitoring via I2C/SMBus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Snapshot Parameter Capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Non-Volatile Memory and Device Security Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Pin-strap Current Sharing Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
SMBus Address (SA0, SA1 Pins) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Current Share Pin-Straps (CFG0, CFG2 Pins) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
SYNC Clock (CFG1 Pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
FN6859 Rev 4.00
April 29, 2011
Page 2 of 43
ZL2008
Soft-start (SS Pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Phase Enable (PH_EN Pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MFR_CONFIG Command. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VOUT_DROOP Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current Sharing Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
36
36
36
37
37
Ordering Information ..................................................................................................................................................................... 38
Related Tools and Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
About Intersil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Package Outline Drawing ................................................................................................................................................................ 43
FN6859 Rev 4.00
April 29, 2011
Page 3 of 43
ZL2008
Absolute Maximum Ratings
DC Supply Voltage for VDD Pin . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 17V
MOSFET Drive Reference for VR Pin. . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
2.5V Logic Reference for V25 Pin . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 3V
Logic I/O Voltage for CFG(0, 1 ,2), DDC, EN, FC(0,1),
ILIM, MGN, PG, PH_EN, SA(0, 1), SALRT, SCL,
SDA, SS, SYNC, UVLO, V(0, 1) Pins . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
Analog Input Voltages for ISENB, VSEN, VTRK,
XTEMP Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
Analog Input Voltages for ISENA PIn . . . . . . . . . . . . . . . . . . . . -1.5V to 6.5V
High Side Supply Voltage for BST Pin . . . . . . . . . . . . . . . . . . . . -0.3V to 30V
Boost to Switch Voltage for BST -SW Pins . . . . . . . . . . . . . . . . . . -0.3V to 8V
High Side Drive Voltage for GH Pin. . . . . . . . . . . .(V
SW
-0.3V) to (V
BST
+0.3V)
Low Side Drive Voltage for GL Pin . . . . . . . . . . . (PGND-0.3V) to (VR+0.3V)
Switch Node Continuous for SW Pin . . . . . . . . . . . . . . .(PGND-0.3V) to 30V
Switch Node Transient (<100ns) for SW Pin . . . . . . . . . . (PGND-5V) to 30V
Ground Differential for DGND – SGND, PGND - SGND Pins . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 0.3V
ESD Rating
Human Body Model (Note 1, Tested per JESD22-A114E). . . . . . . . . . . . . . . . .2kV
Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . 500V
Latch Up (Tested per JESD78). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA
Thermal Information
Thermal Resistance (Typical)
JA
(°C/W)
JC
(°C/W)
36 Ld QFN (Notes 2, 3) . . . . . . . . . . . . . . . .
35
5
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-55°C to +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-55°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Input Supply Voltage Range, V
DD
(See Figure 9)
VDD tied to VR. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.0V to 5.5V
VR floating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 14V
Output Voltage Range, V
OUT
(Note 4) . . . . . . . . . . . . . . . . . . . . 0.54V to 5.5V
Operating Junction Temperature Range, T
J
. . . . . . . . . . . . . . . . . . . -40°C to +125°C
Input Voltage
V
IN
, Rise Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5ms minimum
V
IN
Ramp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Monotonic
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
1. BST, SW pins rated at 1.5kV.
2.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
3. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
4. Includes margin limits.
Electrical Specifications
PARAMETER
V
DD
= 12V, T
A
= -40°C to +85°C unless otherwise noted. Typical values are at T
A
= +25°C. Boldface limits apply
over the operating temperature range, -40°C to +85°C.
CONDITIONS
GH, GL no load
MISC_CONFIG[7] = 1
EN = 0V
No I
2
C/SMBus activity
V
DD
> 6V, I
VR
< 20mA
V
R
> 3V, I
V25
< 20mA
V
IN
> V
OUT
Set using resistors
Set using I
2
C/SMBus
MIN
(Note 14)
–
–
–
4.5
2.25
0.6
–
–
-1
–
-100
-50
-100
TYP
16
25
6.5
5.2
2.5
–
10
±0.025
–
110
–
–
–
MAX
(Note 14)
30
50
9
5.5
2.75
5.0
–
–
1
200
100
50
100
UNIT
mA
mA
mA
V
V
V
mV
% FS
(Note 6)
%
µA
mV
mV
µA
Input and Supply Characteristics
I
DD
Supply Current at f
SW
= 200kHz
I
DD
Supply Current at f
SW
= 1.4MHz
I
DDS
Shutdown Current
Vr Reference Output Voltage
V25 Reference Output Voltage
Output Characteristics
Output Voltage Adjustment Range (Note 5)
Output Voltage Set-point Resolution
Output Voltage Accuracy (Note 7)
Vsen Input Bias Current
Current Sense Differential Input
Voltage (Ground Referenced)
Current Sense Differential Input Voltage (V
out
Referenced, V
out
< 4.0V)
Current Sense Input Bias Current
Includes line, load, temp
VSEN = 5.5V
V
ISENA
-V
ISENB
V
ISENA
-V
ISENB
Ground referenced
FN6859 Rev 4.00
April 29, 2011
Page 4 of 43
ZL2008
Electrical Specifications
PARAMETER
Current Sense Input Bias Current
(V
out
Referenced, V
out
< 4.0V)
Soft-start Delay Duration Range
(Note 8)
Soft-start Delay Duration Accuracy
V
DD
= 12V, T
A
= -40°C to +85°C unless otherwise noted. Typical values are at T
A
= +25°C. Boldface limits apply
over the operating temperature range, -40°C to +85°C.
(Continued)
CONDITIONS
ISENA
ISENB
Set using SS pin or resistor
Set using I
2
C/SMBus
Turn-on delay (precise mode)
(Notes 8, 9, 10)
Turn-on delay (normal mode) (Note 10)
Turn-off delay (Note 10)
MIN
(Note 14)
-1
-100
2
0.002
-
-
-
2
0
–
EN, PG, SCL, SDA, SALRT pins
Multi-mode logic pins
I
OL
4mA
I
OH
-2mA
-250
–
–
2.0
–
2.25
200
Predefined settings (See Table 11)
Factory default
External clock source
-5
95
150
-13
–
(V
BST
-V
SW
) = 4.5V
(V
BST
-V
SW
) = 4.5V, (V
BST
-V
GH
) = 50mV
(V
BST
-V
SW
) = 4.5V, (V
GH
-V
SW
) = 50mV
V
R
= 5V
V
R
= 5V
V
R
= 5V, (V
R
-V
GL
) = 50mV
V
R
= 5V, (V
GL
-PGND) = 50mV
(V
BST
-V
SW
) = 4.5V, C
LOAD
= 2.2nF
V
R
= 5V, C
LOAD
= 2.2nF
2
–
–
–
–
–
–
–
–
TYP
–
–
–
–
±0.25
-0.25/+4
-0.25/+4
–
–
100
–
–
1.4
–
–
–
–
–
–
–
–
4.5
3
0.8
0.5
2.5
1.8
1.2
0.5
5
5
MAX
(Note 14)
1
100
30
500
-
-
-
20
200
–
250
0.8
–
–
0.4
–
1400
5
–
–
13
–
–
2
2
–
–
2
2
20
20
UNIT
µA
µA
ms
s
ms
ms
ms
ms
ms
µs
nA
V
V
V
V
V
kHz
%
%
ns
%
V
A
A
A
ns
ns
Soft-start Ramp Duration Range
Soft-start Ramp Duration Accuracy
Set using SS pin or resistor
Set using I
2
C
Logic Input/Output Characteristics
Logic Input Leakage Current
Logic Input Low, V
IL
Logic Input OPEN (N/C)
Logic Input High, V
IH
Logic Output Low, V
OL
Logic Output High, V
OH
Oscillator and Switching Characteristics
Switching Frequency Range
Switching Frequency Set-point Accuracy
Maximum Pwm Duty Cycle
Minimum Sync Pulse Width
Input Clock Frequency Drift Tolerance
Gate Drivers
High-side driver voltage (V
BST
-V
SW
)
High-side Driver Peak Gate Drive
Current (Pull-down)
High-side Driver Pull-up Resistance
High-side Driver Pull-down Resistance
Low-side Driver Peak Gate
Drive Current (Pull-up)
Low-side Driver Peak Gate
Drive Current (Pull-down)
Low-side Driver Pull-up Resistance
Low-side Driver Pull-down Resistance
Switching Timing
Gh Rise and Fall Time
Gl Rise and Fall Time
Tracking
VTRK Input Bias Current
VTRK Tracking Ramp Accuracy
VTRK Regulation Accuracy
VTRK = 5.5V
100% Tracking, V
OUT
-VTRK
100% Tracking, V
OUT
-VTRK
–
-100
-1
110
–
–
200
+ 100
1
µA
mV
%
FN6859 Rev 4.00
April 29, 2011
Page 5 of 43
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