4.2 Power Conversion Overview .............................................................................................................................................. 12
4.3 Power Management Overview............................................................................................................................................ 13
5.5 Soft Start Delay and Ramp Times ...................................................................................................................................... 18
5.6 Power Good ........................................................................................................................................................................ 19
5.7 Switching Frequency and PLL ........................................................................................................................................... 20
5.8 Power Train Component Selection ..................................................................................................................................... 21
5.9 Current Limit Threshold Selection ..................................................................................................................................... 25
5.15 Adaptive Frequency Control ............................................................................................................................................... 30
6. Power Management Functional Description .............................................................................................................................. 31
6.6 Voltage Tracking ................................................................................................................................................................ 33
6.7 Voltage Margining .............................................................................................................................................................. 34
6.10 Digital-DC Bus ................................................................................................................................................................... 36
6.14 Temperature Monitoring Using the XTEMP Pin ................................................................................................................ 38
6.15 Active Current Sharing ....................................................................................................................................................... 38
6.19 Non-Volatile Memory and Device Security Features ......................................................................................................... 41
8. Ordering Information ................................................................................................................................................................. 43
9. Related Tools and Documentation ............................................................................................................................................. 43
10. Revision History ........................................................................................................................................................................ 44
1.
2.
3.
4.
FN6850 Rev. 1.00
December 15, 2010
Page 3 of 45
ZL2006
1. Electrical Characteristics
Table 1. Absolute Maximum Ratings
Operating beyond these limits may cause permanent damage to the device. Functional operation beyond the
Recommended Operating Conditions is not implied. Voltage measured with respect to SGND.
Parameter
DC supply voltage
MOSFET drive reference
2.5 V logic reference
Pin
VDD
VR
V25
CFG, DLY(0,1), DDC, EN, FC(0,1),
ILIM(0,1), MGN, PG, SA(0,1),
SALRT, SCL, SDA, SS, SYNC,
UVLO, V(0,1)
ISENB, VSEN, VTRK, XTEMP
ISENA
BST
BST - SW
GH
GL
SW
SW
DGND – SGND, PGND - SGND
–
–
All
Value
- 0.3 to 17
- 0.3 to 6.5
120
- 0.3 to 3
120
- 0.3 to 6.5
- 0.3 to 6.5
- 1.5 to 30
- 0.3 to 30
- 0.3 to 8
(V
SW
-0.3) to (V
BST
+0.3)
(PGND-0.3) to (VR+0.3)
(PGND-0.3) to 30
(PGND-5) to 30
- 0.3 to 0.3
- 55 to 150
- 55 to 150
300
Unit
V
V
mA
V
mA
V
V
V
V
V
V
V
V
V
V
°C
°C
°C
Logic I/O voltage
Analog input voltages
High side supply voltage
Boost to switch voltage
High side drive voltage
Low side drive voltage
Switch node continuous
Switch node transient (<100ns)
Ground differential
Junction temperature
Storage temperature
Lead temperature
(Soldering, 10 s)
Table 2. Recommended Operating Conditions and Thermal Information
Parameter
Symbol
Min
Input supply voltage range, V
DD
(See Figure 9)
Output voltage range
1
Operating junction temperature range
Junction to ambient thermal impedance
2
Junction to case thermal impedance
3
Notes:
V
DD
tied to V
R
3.0
4.5
0.54
- 40
–
–
Typ
–
–
–
–
35
5
Max
5.5
14
5.5
125
–
–
Unit
V
V
V
°C
°C/W
°C/W
V
R
floating
V
OUT
T
J
Θ
JA
Θ
JC
1. Includes margin limits
2. Θ
JA
is measured in free air with the device mounted on a multi-layer FR4 test board and the exposed metal pad
soldered to a low impedance ground plane using multiple vias.
3. For Θ
JC
, the “case” temperature is measured at the center of the exposed metal pad
FN6850 Rev. 1.00
December 15, 2010
Page 4 of 45
ZL2006
Table 3. Electrical Specifications
V
DD
= 12 V, T
A
= -40C to 85C unless otherwise noted. Typical values are at T
A
= 25C.
Parameter
Input and Supply Characteristics
I
DD
supply current at f
SW
= 200 kHz
I
DD
supply current at f
SW
= 1.4 MHz
I
DDS
shutdown current
VR reference output voltage
V25 reference output voltage
Output Characteristics
Output voltage adjustment range
1
Output voltage set-point resolution
Output voltage accuracy
3
VSEN input bias current
Current sense differential input
voltage (ground referenced)
Current sense differential input
voltage (V
OUT
referenced)
(V
OUT
must be less than 4.0 V)
Current sense input bias current
Current sense input bias current
(V
OUT
referenced, V
OUT
< 4.0 V)
Soft start delay duration range
4
GH, GL no load;
MISC_CONFIG[7] = 1
EN = 0 V
2
No I C/SMBus activity
V
DD
> 6 V, I
VR
< 50 mA
V
R
> 3 V, I
V25
< 50 mA
V
IN
> V
OUT
Set using resistors
Set using I
2
C/SMBus
Includes line, load, temp
VSEN = 5.5 V
V
ISENA
- V
ISENB
V
ISENA
- V
ISENB
Ground referenced
ISENA
ISENB
Set using DLY pin or resistor
Set using I
2
C/SMBus
Turn-on delay (precise mode)
4,5
–
Turn-on delay (normal mode)
6
Turn-off delay
6
Set using SS pin or resistor
Set using I
2
C
–
–
–
4.5
2.25
0.6
–
–
-1
–
- 100
- 50
- 100
-1
- 100
2
0.002
16
25
6.5
5.2
2.5
–
10
±0.025
–
110
–
–
30
50
8
5.5
2.75
5.0
–
–
1
200
100
50
mA
mA
mA
V
V
V
mV
% FS
2
%
µA
mV
mV
µA
µA
µA
ms
s
ms
ms
ms
ms
ms
µs
Conditions
Min
Typ
(Note 10)
Max
(Note 10)
Unit
Soft start delay duration accuracy
–
0
0
–
Soft start ramp duration range
Soft start ramp duration accuracy
Notes:
100
–
1
–
100
–
–
200
–
500
±0.25
-
–
–
–
0.25/+4
–
-
0.25/+4
200
–
200
–
100
–
1. Does not include margin limits.
2. Percentage of Full Scale (FS) with temperature compensation applied.
3. V
OUT
measured at the termination of the VSEN+ and VSEN- sense points.
4. The device requires a delay period following an enable signal and prior to ramping its output. Precise timing mode limits this delay
period to approx 2 ms, where in normal mode it may vary up to 4 ms.
5. Precise ramp timing mode is only valid when using EN pin to enable the device rather than PMBus enable.
6. The devices may require up to a 4 ms delay following the assertion of the enable signal (normal mode) or following the de-assertion
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