DATASHEET
LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER
Description
The ICS552-02 is a low skew, single-input to eight-
output clock buffer. The device offers a dual input with
pin select for glitch-free switching between two clock
sources. It is part of IDT’s ClockBlocks
TM
family. See
the ICS553 for a 1 to 4 low skew buffer. For more than
8 outputs see the MK74CBxxx Buffalo
TM
series of clock
drivers.
IDT makes many non-PLL and PLL based low skew
output devices as well as Zero Delay Buffers to
synchronize clocks. Contact us for all of your clocking
needs.
ICS552-02
Features
•
•
•
•
•
•
•
•
•
•
Extremely low skew outputs (50ps maximum)
Packaged in 16 pin TSSOP
Available in Pb (lead) free package
Low power CMOS technology
Operating Voltages of 2.5 V to 5 V
Output Enable pin tri-states outputs
5 V tolerant input clocks
Input/Output clock frequency up to 200 MHz
Input clock multiplexer simplifies clock selection
Industrial temperature
NOTE: EOL for non-green parts to occur on
5/13/10 per PDN U-09-01
Block Diagram
Q0
Q1
Q2
IN A
1
Q3
Q4
Q5
Q6
Q7
IN B
0
S E LA
OE
IDT™ / ICS™
LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER
1
ICS552-02
REV K 092309
ICS552-02
LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER
CLOCK MUX AND BUFFER
Pin Assignment
OE
VDD
Q0
Q1
Q2
Q3
GND
INB
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SELA
VDD
Q7
Q6
Q5
Q4
GND
INA
Input Source Select
SELA
0
1
Input
INB
INA
16 Pin TSSOP
Pin Descriptions
Pin
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin
Name
OE
VDD
Q0
Q1
Q2
Q3
GND
INB
INA
GND
Q4
Q5
Q6
Q7
VDD
SELA
Pin
Type
Input
Power
Output
Output
Output
Output
Power
Input
Input
Power
Output
Output
Output
Output
Power
Input
Pin Description
Output Enable. Tri-states outputs when low. Internal pull-up resistor.
Connect to +2.5V, +3.3V or +5.0V. Must be the same as pin 15.
Clock Output 0
Clock Output 1
Clock Output 2
Clock Output 3
Connect to ground.
Clock Input B. 5V tolerant input.
Clock Input A. 5V tolerant input.
Connect to ground.
Clock Output 4
Clock Output 5
Clock Output 6
Clock Output 7
Connect to + 2.5V, +3.3V or +5.0V. Must be the same as pin 2.
Selects either INA or INB. Internal pull-up resistor.
External Components
A minimum number of external components are required for proper operation. Decoupling capacitors of
0.01
µF
should be connected between VDD on pin 2 and GND on pin 7, and between VDD on pin 15 and
GND on pin 10, as close to the device as possible. A 33
Ω
series terminating resistor should be used on
each clock output if the trace is longer than 1 inch.
To achieve the low output skews that the ICS552-02 is capable of, careful attention must be paid to board
layout. Essentially, all 8 outputs must have identical terminations, identical loads, and identical trace
geometries. If they do not, the output skew will be degraded. For example, using a 30Ω series termination
on one output (with 33Ω on the others) will cause at least 15ps of skew.
IDT™ / ICS™
LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER
2
ICS552-02
REV K 092309
ICS552-02
LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER
CLOCK MUX AND BUFFER
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS552-02. These ratings,
which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Supply Voltage, VDD
SELA, OE, and all Outputs
INA and INB
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature
7V
Rating
-0.5 V to VDD+0.5 V
-0.5V to 5.5V
-40 to +85
°
C
-65 to +150
°
C
175
°
C
260
°
C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Min.
-40
+2.375
Typ.
–
Max.
+85
+5.25
Units
°
C
V
DC Electrical Characteristics
VDD=2.5 V ±5%
, Ambient temperature -40 to +85
°
C, unless stated otherwise
Parameter
Operating Voltage
Input High Voltage, INA, INB
Input Low Voltage, INA, INB
Input High Voltage, OE, SELA
Input Low Voltage, OE, SELA
Output High Voltage
Output Low Voltage
Operating Supply Current
Short Circuit Current
Symbol
VDD
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
IDD
I
OS
Conditions
Note 1
Note 1
Min.
2.375
VDD/2+0.5
1.8
Typ.
Max.
2.625
5.5
VDD/2-0.5
VDD
0.7
Units
V
V
V
V
V
V
V
mA
mA
I
OH
= -16 mA
I
OL
= 16 mA
No load, 135 MHz
Each output
2
0.4
35
60
IDT™ / ICS™
LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER
3
ICS552-02
REV K 092309
ICS552-02
LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER
CLOCK MUX AND BUFFER
DC Electrical Characteristics (continued)
VDD=3.3 V ±5%
, Ambient temperature -40 to +85
°
C, unless stated otherwise
Parameter
Operating Voltage
Input High Voltage, INA, INB
Input Low Voltage, INA, INB
Input High Voltage, OE, SELA
Input Low Voltage, OE, SELA
Output High Voltage
Output Low Voltage
Output High Voltage (CMOS
Level)
Operating Supply Current
Short Circuit Current
Symbol
VDD
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
V
OH
IDD
I
OS
Conditions
Note 1
Note 1
Min.
3.135
VDD/2+0.7
2
Typ.
Max.
3.465
5.5
VDD/2-0.7
VDD
0.8
Units
V
V
V
V
V
V
V
V
I
OH
= -25 mA
I
OH
= 25 mA
I
OH
= -12 mA
No load, 135 MHz
Each output
2.4
0.4
VDD-0.4
50
80
mA
mA
VDD=5 V ±5%
, Ambient temperature -40 to +85
°
C, unless stated otherwise
Parameter
Operating Voltage
Input High Voltage, INA, INB
Input Low Voltage, INA, INB
Input High Voltage, OE, SELA
Input Low Voltage, OE, SELA
Output High Voltage
Output Low Voltage
Output High Voltage (CMOS
Level)
Operating Supply Current
Short Circuit Current
Symbol
VDD
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
V
OH
IDD
I
OS
Conditions
Note 1
Note 1
Min.
4.75
VDD/2+1
2
Typ.
Max.
5.25
5.5
VDD/2-1
VDD
0.8
Units
V
V
V
V
V
V
V
V
I
OH
= -35 mA
I
OL
= 35 mA
I
OH
= -12 mA
No load, 135 MHz
Each output
2.4
0.4
VDD-0.4
85
100
mA
mA
Note: 1. Nominal switching threshold is VDD/2
IDT™ / ICS™
LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER
4
ICS552-02
REV K 092309
ICS552-02
LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER
CLOCK MUX AND BUFFER
AC Electrical Characteristics
VDD = 2.5V ±5%
, Ambient Temperature -40 to +85
°
C, unless stated otherwise
Parameter
Input Frequency
Output Rise Time
Output Fall Time
Propagation Delay
Output to output skew
Input A to Input B skew
t
OR
t
OF
Note 1
Note 2
Note 3
Rising edges at VDD/2
0.8 to 2.0 V, C
L
=15 pF
2.0 to 0.8 V, C
L
=15 pF
Symbol
Conditions
Min.
0
Typ.
1.0
1.0
3.5
0
0
Max. Units
200
1.5
1.5
50
50
MHz
ns
ns
ns
ps
ps
VDD = 3.3V ±5%
, Ambient Temperature -40 to +85
°
C, unless stated otherwise
Parameter
Input Frequency
Output Rise Time
Output Fall Time
Propagation Delay
Output to output skew
Input A to Input B skew
Part to Part Skew
t
OR
t
OF
Note 1
Note 2
Note 3
Rising edges at VDD/2
0.8 to 2.0 V, C
L
=15 pF
2.0 to 0.8 V, C
L
=15 pF
2.0
Symbol
Conditions
Min.
0
Typ.
0.6
0.6
3.0
0
0
Max. Units
200
1.0
1.0
5.5
50
50
3.5
MHz
ns
ns
ns
ps
ps
ns
VDD = 5.0V ±5%
, Ambient Temperature -40 to +85
°
C, unless stated otherwise
Parameter
Input Frequency
Output Rise Time
Output Fall Time
Propagation Delay
Output to output skew
Input A to Input B skew
t
OR
t
OF
Note 1
Note 2
Note 3
Rising edges at VDD/2
0.8 to 2.0 V, C
L
=15 pF
2.0 to 0.8 V, C
L
=15 pF
Symbol
Conditions
Min.
0
Typ.
0.3
0.3
2.8
0
0
Max. Units
200
0.7
0.7
50
50
MHz
ns
ns
ns
ps
ps
Notes: 1. With rail-to-rail input clock.
2. Between any two outputs with equal loading.
3. Propagation delay matching through the part.
4. Duty cycle on outputs will match incoming clock duty cycle. Consult IDT for tight duty cycle clock
generators.
IDT™ / ICS™
LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER
5
ICS552-02
REV K 092309
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