531WC1365M00DG datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Passive components> oscillator> 531WC1365M00DG

531WC1365M00DG: DescriptionCMOS/TTL Output Clock Oscillator, 1365MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531WC1365M00DG Overview

CMOS/TTL Output Clock Oscillator, 1365MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531WC1365M00DG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
package instruction	ROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Code	unknown
Other features	TRAY
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	7%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	1365 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	CMOS/TTL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	1.89 V
Minimum supply voltage	1.71 V
Nominal supply voltage	1.8 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

Positive terminal buck/boost LED constant current drive circuit diagram

Gyro amplifier circuit

Two-stage gradually brightening delay light circuit

Zero Drift Op Amp Circuit

series resonant circuit

Computer motherboard circuit diagram 440BX_13

Problems with angle recognition using mpu6050: How to solve this problem?...; wenshow stm32/stm8

Problems with NFS: [i=s]This post was last edited by chenbingjy on 2016-10-15 09:05[/i] I am working on NFS, and my operating system is Ubuntu. Please refer to the following link. [url=http://blog.sina.com.cn/s/blog_664...; chenbingjy Linux and Android

I soldered a fast board myself, how can I verify that the external high-speed crystal oscillator and low-speed crystal oscillator are working properly? There is a special function to return the clock frequency...: [color=#000][size=15px]The chip says that the two capacitors for the high-speed clock should be 30pf at best, and the two capacitors for the low-speed clock should not exceed 15pf, but I only have 22p...; 赵怡彬 stm32/stm8

Thread access data mechanism in C: 1. If both thread A and thread B can access a piece of data C, but other threads cannot access it, what mechanism should be adopted to protect data C? 2. If data C can only be accessed by thread A, wh...; sdg430 Embedded System

Use SensorTile and EXCEL to perform simple analysis on the data of dual-channel microphone: [i=s]This post was last edited by littleshrimp on 2017-10-17 10:23[/i] [align=left][color=#a0522d][/color][/align][align=left][color=#a0522d] [/color][/align][align=left][font=微软雅黑][size=5][color=#a05...; littleshrimp MEMS sensors

[Integrated subway security control system based on Raspberry Pi 400] Material unboxing - Raspberry Pi 400: [i=s]This post was last edited by donatello1996 on 2022-7-15 09:45[/i][2022 Digi-Key Innovation Design Competition] [Integrated subway security control system based on Raspberry Pi 400] Material unbox...; donatello1996 DigiKey Technology Zone

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components