530FB212M500BG datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Passive components> oscillator> 530FB212M500BG

530FB212M500BG: DescriptionLVDS Output Clock Oscillator, 212.5MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size268KB，15 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

530FB212M500BG Overview

LVDS Output Clock Oscillator, 212.5MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530FB212M500BG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Reach Compliance Code	unknown
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	20%
JESD-609 code	e4
Manufacturer's serial number	530
Installation features	SURFACE MOUNT
Nominal operating frequency	212.5 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVDS
physical size	177.8mm x 127.0mm x 41.91mm
longest rise time	0.35 ns
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.0 7/06

Si530/531

Recommended Resources

Uncommonly used homemade home TV circuit diagram

Working principle diagram of RS flip-flop

Touch voice car bell circuit

LT1111 working principle diagram (a)

Use electric contact pressure gauge to make hydraulic and pneumatic automatic control circuit

Single board computer automatic reset and start circuit

Let's discuss the principles of a common fuel dispenser system. Experts are welcome to give us some advice!: The article is on QQ: 312186018 space http://cnc.imgcache.qq.com/qzone/newblog/blogcontent.html#bid=1203525698...; nanhe Embedded System

[Repost] Case caused by 3 cm dangling wire: [p=16, null, left][color=rgb(0, 0, 0)][font=Arial, Helvetica, sans-serif, 宋体]The article is transferred from ZJD01's blog[/font][/color][/p] [p=16, null, left][color=rgb(0, 0, 0)][font=Arial, Helvetic...; wstt Microcontroller MCU

To make a 16-4 encoder with 16 I ports and 4 O ports, which model of GAL or CPLD is needed?: To make a 16-4 encoder with 16 I ports and 4 O ports, which model of GAL or CPLD is needed?...; FPGA小牛 FPGA/CPLD

Recommend a project to friends who like to play with Linux system or love embedded Linux: The open source project maxwit linux builds the entire embedded linux system step by step from scratch. Friends who don't have an open board can run maxwit linux in the simulator. The benefits are sim...; xiaoyake1 Linux and Android

uCOSII(V2.86) transplantation example based on LM3S2965: This porting example is for the LM3S2965-EVM development board. The code can be slightly modified to suit other series of Stellaris ARM. For detailed code description, please refer to the "LM3S2965-EV...; microli Microcontroller MCU

How to answer incoming calls received by TAPI: I developed a program for making and receiving calls in Windows mobile 6 using TAPI. After receiving 3 rings, I executed the lineAnswer function to answer the call, but it didn't work. How can I autom...; liuyiyuan Embedded System

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components