530SB1009M00DG datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Passive components> oscillator> 530SB1009M00DG

530SB1009M00DG: DescriptionLVDS Output Clock Oscillator, 1009MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

530SB1009M00DG Overview

LVDS Output Clock Oscillator, 1009MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530SB1009M00DG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Reach Compliance Code	unknown
Other features	TRAY
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	20%
JESD-609 code	e4
Manufacturer's serial number	530
Installation features	SURFACE MOUNT
Nominal operating frequency	1009 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVDS
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

Delay alarm circuit

Simple and efficient LED constant current drive circuit diagram

Binary input decimal display circuit

Voltage-limited nickel-cadmium battery charger

PS21, 700X/700Y, WT112 Figure 2

875p computer motherboard circuit diagram_081

High-efficiency integrated power supplies from Texas Instruments: TI's broad portfolio of power management ICs supports the needs of NXP processors and Xilinx FPGAs. As can be seen from our complete reference designs (hardware and software with documentation), TI PM...; Aguilera Analogue and Mixed Signal

Encoder Problems: I designed an encoder circuit, as shown below:This circuit works fine for stepper motor drivers, but it has problems with servo motor drivers. When the motor is not rotating, it will be triggered by m...; chenbingjy Analog electronics

Implementing high-performance DSP functions using Spartan-3 FPGA: Spartan-3 FPGAs enable embedded DSP functions at a breakthrough price point. This article describes the features of Spartan-3 FPGAs that are optimized for DSP and analyzes their performance and cost a...; feifei DSP and ARM Processors

EEWORLD University Hall----TI Designs touch wheel and LED tracking display solution live demonstration: TI Designs touch wheel and LED tracking display solution live demonstration : https://training.eeworld.com.cn/course/110...; cuipin Embedded System

Please help me check the PWM output of stm32. Why do I only get high level output but no waveform when I measure it at PA7 port with an oscilloscope?: #include "stm32f10x.h" void PWM_Init(u16 arr,u16 psc) { RCC->APB1ENR|=1APB2ENR|=1CRL&=0x0FFFFFFF; GPIOA->CRL|=0x30000000; GPIOA->ODR|=1ARR=arr; TIM3->PSC=psc; TIM3->CCMR1|=7CCMR1|=1CCER|=1CR1=0x0080;T...; 光林火叶 stm32/stm8

A 2W carbon film resistor is connected to a 10mA current.: Will a carbon film resistor with a rated power of 2W and a resistance of 10K be very hot when a current of 10mA is passed through it? Why does it get so hot after a while of powering it on? It seems l...; smartygt Analog electronics

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components