PF1102-01
SED157A Series
SED157A Series
Dot Matrix LCD Driver
q
Support up to 65×224 Display
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Built-in Power Supply Circuit for LCD
s
OVERVIEW
The SED157A Series is a single-chip dot matrix liquid crystal display driver that can be connected directly to a
microprocessor bus. Eight-bit parallel or serial display data transmitted from the microprocessor is stored in the
internal display data RAM, and the chip generates liquid crystal drive signals, independently of the micropro-
cessor.
It has a on-chip 65
×
256-bit display data RAM, and there is a one-to-one correspondence between the dot pixel
on the liquid crystal panel pixels and internal RAM bit. This feature ensures implementation of highly free
display.
The SED157A Series incorporate 65 common output circuits and 224 segment output circuits. A single chip
can drive a 65
×
224 dot display (capable of displaying 14 columns
×
4 rows with 16
×
16-dot kanji font).
Further, display capacity can be extended by designing two chips in a master/display configuration.
The SED157A Series can read and write RAM data with the minimum current consumption because it does not
require any external operation clock. Also it incorporates a LCD power supply featuring a very low current
consumption, a LCD drive power voltage regulator resistor and a display clock CR oscillator circuit. This allows
the display system of a high-performance for handy equipment to be realized at the minimum power consump-
tion and minimum component configuration.
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FEATURES
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Direct display of RAM data using the display data RAM
RAM bit data “1” ...... goes on.
“0” ...... goes off (at display normal rotation).
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RAM capacity
65
×
256 = 16,640 bits
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Liquid crystal drive circuit
65 circuits for the common output and 224 circuits for the segment output
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High-speed 8-bit MPU interface (Both the 80 and 68 series MUPs can directly be connected.)/serial inter-
face enabled
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Abundant command functions
Display Data Read/Write, Display ON/OFF, Display Normal Rotation/Reversal, Page Address Set, Display
Start Line Set, column address set, Status Read, Power Supply Save Display All Lighting ON/OFF, LCD Bias
Set, Read Modify Write, Segment Driver Direction Select, Electronic Control, V5 Voltage Adjusting Built-in
Resistance Ratio Set, Static Indicator, n Line Alternating Current Reversal Drive, Common Output State
Selection, and Built-in Oscillator Circuit ON
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Built-in static drive circuit for indicators (One set, blinking speed variable)
1
SED157A Series
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Built-in power supply circuit for low power supply liquid crystal drive
Booster circuit (Boosting magnification - double, triple, quadruple, boosting reference power supply external
input enabled)
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3% high accuracy alternating current voltage adjusting circuit (Temperature gradient: –0.05%/°C)
Built-in V
5
voltage adjusting resistor, built-in V
1
to V
4
voltage generation split resistors, built-in electronic
control function, and voltage follower
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Built-in CR oscillator circuit (external clock input enabled)
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Ultra-low power consumption
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Power supplies
Logic power supply: V
DD
– V
SS
= 1.8 to 5.5 V
Boosting reference power supply: V
DD
– V
SS
= 1.8 to 6.0 V
Liquid crystal drive power supply: V
5
– V
DD
= –4.5 to –18.0 V
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Wide operating temperature range –40 to 85°C
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CMOS process
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Shipping form Bare chip, TCP
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No light-resistant and radiation-resistant design are provided.
Series specification
Product name
SED157AD
0B
SED157AT
0*
Duty
1/65
1/65
Bias
1/9, 1/7
1/9, 1/7
SEG Dr
224
224
COM Dr
65
65
V
REG
temperature
gradient
–0.05%/°C
–0.05%/°C
Shipping form
Bare chip
TCP
2
SED157A Series
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BLOCK DIAGRAM
SEG223
COM63
Display timing generator circuit
• • • • • • • • • • • • • • • • • • • • • • • • •
• • • • • • • • • •
V
SS
V
DD
V
1
V
2
V
3
V
4
V
5
Shift register
SEG Drivers
COM Drivers
CAP1+
CAP1–
Power supply circuit
Display data latch circuit
Page address
V
OUT
Display data RAM
256 x 65
Line address
CAP2+
CAP2–
CAP3–
COMS
COMS
COM0
SEG0
I/O buffer
FRS
FR
SYNC
CL
DOF
M/S
V
SS2
V
R
V
RS
IRS
HPM
Column address
Oscillator circuit
CLS
Bus holder
Command decoder
Status
Interface
MPU
D6 (SCL)
WR (R/W)
D7 (SI)
RD (E)
RES
CS1
CS2
P/S
D5
D4
D3
D2
D1
D0
A0
3
SED157A Series
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PIN ASSIGNMENT
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Chip Specification
117
118
SED157A Series
Y
X
(0, 0)
D157AD
0B
1
417
Die No.
152
153
382
383
Item
Chip size
Chip thickness
Bump pitch
Bump size
PAD No.1 to 117
PAD No.118
PAD No.119 to 151
PAD No.152
PAD No.153
PAD No.154 to 381
PAD No.382
PAD No.383
PAD No.384 to 416
PAD No.417
Bump height
Size
X
16.65
×
0.625
69 (Min.)
×
×
×
×
×
×
×
×
×
×
17 (Typ.)
Y
2.90
Unit
mm
mm
µm
µm
µm
µm
µm
µm
µm
µm
µm
µm
µm
µm
85
85
85
85
73
47
73
86
85
85
85
73
47
73
85
85
85
73
47
73
4
SED157A Series
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PIN DESCRIPTION
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Power Supply Pin
Pin name
V
DD
V
SS
V
SS2
V
RS
I/O
Power
supply
Power
supply
Power
supply
Power
supply
Power
supply
Description
Commonly used with the MPU power supply pin V
CC
.
0 V pin connected to the system ground (GND)
Boosting circuit reference power supply for liquid crystal drive
External input pin for liquid crystal power supply voltage
adjusting circuit
They are set to OPEN
Multi-level power supply for liquid crystal drive. The voltage specified according
to liquid crystal cells is impedance-converted by a split resistor or operation
amplifier (OP amp) and applied.
The potential needs to be specified based on V
DD
to establish the relationship of
dimensions shown below:
V
DD
(=V
0
)
≥
V
1
≥
V
2
≥
V
3
≥
V
4
≥
V
5
Master operation When the power supply is ON, the following voltages are
applied to V
1
~ V
4
from the built-in power supply circuit. The selection of the
voltages is determined using the LCD bias set command.
V
1
V
2
V
3
V
4
1/9•V
5
2/9•V
5
7/9•V
5
8/9•V
5
1/7•V
5
2/7•V
5
5/7•V
5
6/7•V
5
Number of
pins
12
9
5
2
10
V
1
, V
2
V
3
, V
4
V
5
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LCD Power Supply Circuit Pin
Pin name
CAP1+
CAP1–
CAP2+
CAP2–
CAP3–
V
OUT
V
R
I/O
O
O
O
O
O
O
I
Description
Boosting capacitor positive side connecting pin. Connects a capacitor between
the pin and CAP1– pin.
Boosting capacitor negative side connecting pin. Connects a capacitor between
the pin and CAP1+ pin.
Boosting capacitor positive side connecting pin. Connects a capacitor
between the pin and CAP2– pin.
Boosting capacitor negative side connecting pin. Connects a capacitor between
the pin and CAP2+ pin.
Boosting capacitor negative side connecting pin. Connects a capacitor between
the pin and CAP1+ pin.
Boosting output pin. Connects a capacitor between the pin and V
SS2
.
Voltage adjusting pin. Applies voltage between V
DD
and V
5
using a split resistor.
Valid only when the V
5
voltage adjusting built-in resistor is not used (IRS=“L”)
Do not use VR when the V
5
voltage adjusting built-in resistor is used (IRS=“H”)
Number of
pins
2
2
2
2
2
2
1
5
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