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844004AK-104LF

Description
VFQFPN-32, Tray
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size554KB,18 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
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844004AK-104LF Overview

VFQFPN-32, Tray

844004AK-104LF Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeVFQFPN
package instructionVFQFN-32
Contacts32
Manufacturer packaging codeNLG32P1
Reach Compliance Codecompliant
ECCN codeEAR99
Other featuresALSO OPERATES AT 3.3V SUPPLY
JESD-30 codeS-XQCC-N32
JESD-609 codee3
length5 mm
Humidity sensitivity level3
Number of terminals32
Maximum operating temperature70 °C
Minimum operating temperature
Maximum output clock frequency226.66 MHz
Package body materialUNSPECIFIED
encapsulated codeHVQCCN
Encapsulate equivalent codeLCC32,.2SQ,20
Package shapeSQUARE
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
power supply2.5/3.3 V
Master clock/crystal nominal frequency26.5625 MHz
Certification statusNot Qualified
Maximum seat height1 mm
Maximum slew rate105 mA
Maximum supply voltage2.625 V
Minimum supply voltage2.375 V
Nominal supply voltage2.5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width5 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER
Base Number Matches1
FemtoClocks™ Crystal-TO-LVDS
Frequency Synthesizer
844004-104
DATA SHEET
General Description
The 844004-104 is a 4 output LVDS Synthesizer optimized to
generate Fibre Channel reference clock frequencies. Using a
26.5625MHz 18pF parallel resonant crystal, the following
frequencies can be generated based on the 2 frequency select
pins (F_SEL[1:0]): 212.5MHz, 187.5MHz, 159.375MHz,
106.25MHz and 53.125MHz. The 844004-104 uses IDT’s 3
rd
generation low phase noise VCO technology and can achieve
<1ps typical rms phase jitter, easily meeting Fibre Channel jitter
requirements. The 844004-104 is packaged in a 32-pin VFQFN
package.
Features
Four differential LVDS outputs
Selectable crystal oscillator interface or LVCMOS/LVTTL
single-ended input
Supports the following output frequencies: 212.5MHz,
187.5MHz, 159.375MHz, 106.25MHz and 53.125MHz
VCO range: 560MHz - 680MHz
RMS phase jitter at 212.5MHz (637kHz – 10MHz), using a
26.5625MHz crystal: <1ps (typical)
Full 3.3V or 2.5V output supply modes
0°C to 70°C ambient operating temperature
Available in lead-free (RoHS 6) packages
Table 1. Frequency Table
Inputs
Input
Frequency
(MHz)
26.5625
26.5625
26.5625
26.5625
23.4375
F_SEL1
F_SEL0
M
N
M/N
Output
Divider Divider Divider Frequency
Value
Value
Value
(MHz)
24
24
24
24
24
3
4
6
12
3
8
6
4
2
8
212.5
(default)
159.375
106.25
53.125
187.5
(default)
Pin Assignment
V
DDO
nQ1
32 31 30 29 28 27 26 25
Q0
nQ0
MR
nPLL_SEL
nc
nc
nc
1
2
3
4
5
6
7
8
9
V
DDA
V
DDO
nQ2
Q1
nc
nc
Q2
24
Q3
nQ3
GND
nc
nc
nXTAL_SEL
REF_CLK
GND
0
0
1
1
0
0
1
0
1
0
ICS844004-104
32 Lead VFQFN
5mm x 5mm x 0.925mm
package body
K Package
Top View
10 11 12 13 14 15 16
XTAL_IN
F_SEL0
F_SEL1
V
DD
XTAL_OUT
nc
nc
23
22
21
20
19
18
17
nc
Block Diagram
F_SEL[1:0]
nPLL_SEL
Pulldown
Pulldown
2
Q0
REF_CLK
Pulldown
26.5625MHz
1
1
XTAL_IN
OSC
XTAL_OUT
nXTAL_SEL
Pulldown
0
Phase
Detector
VCO
637.5MHz
(w/26.5625MHz
Reference)
F_SEL[1:0]
0 0 ÷3
0 1 ÷4
1 0 ÷6
1 1 ÷12
nQ0
Q1
nQ1
Q2
nQ2
0
M = 24 (fixed)
Q3
nQ3
MR
Pulldown
844004-104 Rev A 6/10/15
1
©2015 Integrated Device Technology, Inc.
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844004AK-104LF 844004AK-104LFT
Description VFQFPN-32, Tray VFQFPN-32, Reel
Brand Name Integrated Device Technology Integrated Device Technology
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Parts packaging code VFQFPN VFQFPN
package instruction VFQFN-32 VFQFN-32
Contacts 32 32
Manufacturer packaging code NLG32P1 NLG32P1
Reach Compliance Code compliant compliant
ECCN code EAR99 EAR99
Other features ALSO OPERATES AT 3.3V SUPPLY ALSO OPERATES AT 3.3V SUPPLY
JESD-30 code S-XQCC-N32 S-XQCC-N32
JESD-609 code e3 e3
length 5 mm 5 mm
Humidity sensitivity level 3 3
Number of terminals 32 32
Maximum operating temperature 70 °C 70 °C
Maximum output clock frequency 226.66 MHz 226.66 MHz
Package body material UNSPECIFIED UNSPECIFIED
encapsulated code HVQCCN HVQCCN
Encapsulate equivalent code LCC32,.2SQ,20 LCC32,.2SQ,20
Package shape SQUARE SQUARE
Package form CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) 260 260
power supply 2.5/3.3 V 2.5/3.3 V
Master clock/crystal nominal frequency 26.5625 MHz 26.5625 MHz
Certification status Not Qualified Not Qualified
Maximum seat height 1 mm 1 mm
Maximum slew rate 105 mA 105 mA
Maximum supply voltage 2.625 V 2.625 V
Minimum supply voltage 2.375 V 2.375 V
Nominal supply voltage 2.5 V 2.5 V
surface mount YES YES
technology CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed
Terminal form NO LEAD NO LEAD
Terminal pitch 0.5 mm 0.5 mm
Terminal location QUAD QUAD
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
width 5 mm 5 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER
Base Number Matches 1 1
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