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CY7C1016-15VC

Description
Standard SRAM, 256KX4, 15ns, CMOS, PDSO32, 0.400 INCH, SOJ-32
Categorystorage    storage   
File Size80KB,1 Pages
ManufacturerCypress Semiconductor
Download Datasheet Parametric Compare View All

CY7C1016-15VC Overview

Standard SRAM, 256KX4, 15ns, CMOS, PDSO32, 0.400 INCH, SOJ-32

CY7C1016-15VC Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
Parts packaging codeSOJ
package instructionSOJ,
Contacts32
Reach Compliance Codecompliant
ECCN code3A991.B.2.B
Maximum access time15 ns
Other featuresAUTOMATIC POWER-DOWN
JESD-30 codeR-PDSO-J32
JESD-609 codee0
length20.955 mm
memory density1048576 bit
Memory IC TypeSTANDARD SRAM
memory width4
Humidity sensitivity level2
Number of functions1
Number of ports1
Number of terminals32
word count262144 words
character code256000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize256KX4
Output characteristics3-STATE
ExportableYES
Package body materialPLASTIC/EPOXY
encapsulated codeSOJ
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)225
Certification statusNot Qualified
Maximum seat height3.7592 mm
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTIN LEAD
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width10.16 mm
Base Number Matches1
7c1006: 11-25-91
Revision: April 10, 1995
ADVANCED INFORMATION
CMOS static RAM organized as 262,144
words by 4 bits. Easy memory expansion is
D
provided by an active LOW chip enable
(CE), an active LOW output enable (OE),
and three state drivers. The device has an
D
automatic power down feature that signifi
D
cantly reduces power consumption when
D
deselected.
D
Writing to the device is accomplished by
taking chip enable (CE) and write enable
(WE) inputs LOW. Data on the four I/O
D
pins (I/O
0
through I/O
3
) is then written
Functional Description
into the location specified on the address
The CY7C1016 is a high performance pins (A
0
through A
17
).
Features
High speed
t
AA
= 10 ns
Output enable (OE) feature
CMOS for optimum speed/power
Center power/ground pinout
Automatic power down when
deselected
TTL compatible inputs and outputs
CY7C1016
256K x 4 Static RAM
Reading from the device is accomplished
by taking chip enable (CE) LOW while
forcing write enable (WE) HIGH. Under
these conditions, the contents of the
memory location specified by the address
pins will appear on the four I/O pins.
The four input/output pins (I/O
0
through
I/O
3
) are placed in a high impedance state
when the device is deselected (CE HIGH),
or during a write operation (CE and WE
LOW).
The CY7C1016 is available in standard
400 mil wide SOJs.
Logic Block Diagram
Pin Configuration
SOJ
Top View
NC
A
0
A
1
A
2
A
3
CE
I/O
0
INPUT BUFFER
A
1
SENSE AMPS
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
ROW DECODER
I/O
3
V
CC
GND
I/O
1
WE
A
4
A
5
I/O
2
A6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A
17
A
16
A
15
A
14
A
13
OE
I/O
3
GND
V
CC
I/O
2
A
12
A
11
A
10
A
9
A
8
NC
512 x 512 x 4
ARRAY
A
7
NC
I/O
1
C1016-2
I/O
0
COLUMN
DECODER
POWER
DOWN
CE
A
10
A
11
A
12
A
13
A
14
A
15
A
16
A
17
A
0
WE
C1016-1
Selection Guide
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum Standby Current (mA)
Document #: 38-00439
Cypress Semiconductor Corporation
7C1016-10
Commercial
Military
Commercial
Military
D
10
175
55
7C1016-12
12
165
175
50
50
7C1016-15
15
155
165
40
40
3901 North First Street
1
D
San Jose
D
CA 95134
D
408-943-2600
April 1995

CY7C1016-15VC Related Products

CY7C1016-15VC CY7C1016-12VC CY7C1016-10VC
Description Standard SRAM, 256KX4, 15ns, CMOS, PDSO32, 0.400 INCH, SOJ-32 Standard SRAM, 256KX4, 12ns, CMOS, PDSO32, 0.400 INCH, SOJ-32 Standard SRAM, 256KX4, 10ns, CMOS, PDSO32, 0.400 INCH, SOJ-32
Is it lead-free? Contains lead Contains lead Contains lead
Is it Rohs certified? incompatible incompatible incompatible
Parts packaging code SOJ SOJ SOJ
package instruction SOJ, SOJ, SOJ,
Contacts 32 32 32
Reach Compliance Code compliant compliant compliant
ECCN code 3A991.B.2.B 3A991.B.2.B 3A991.B.2.B
Maximum access time 15 ns 12 ns 10 ns
Other features AUTOMATIC POWER-DOWN AUTOMATIC POWER-DOWN AUTOMATIC POWER-DOWN
JESD-30 code R-PDSO-J32 R-PDSO-J32 R-PDSO-J32
JESD-609 code e0 e0 e0
length 20.955 mm 20.955 mm 20.955 mm
memory density 1048576 bit 1048576 bit 1048576 bit
Memory IC Type STANDARD SRAM STANDARD SRAM STANDARD SRAM
memory width 4 4 4
Humidity sensitivity level 2 2 2
Number of functions 1 1 1
Number of ports 1 1 1
Number of terminals 32 32 32
word count 262144 words 262144 words 262144 words
character code 256000 256000 256000
Operating mode ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS
Maximum operating temperature 70 °C 70 °C 70 °C
organize 256KX4 256KX4 256KX4
Output characteristics 3-STATE 3-STATE 3-STATE
Exportable YES YES YES
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOJ SOJ SOJ
Package shape RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE
Parallel/Serial PARALLEL PARALLEL PARALLEL
Peak Reflow Temperature (Celsius) 225 225 225
Certification status Not Qualified Not Qualified Not Qualified
Maximum seat height 3.7592 mm 3.7592 mm 3.7592 mm
Nominal supply voltage (Vsup) 5 V 5 V 5 V
surface mount YES YES YES
technology CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface TIN LEAD TIN LEAD TIN LEAD
Terminal form J BEND J BEND J BEND
Terminal pitch 1.27 mm 1.27 mm 1.27 mm
Terminal location DUAL DUAL DUAL
Maximum time at peak reflow temperature 30 30 30
width 10.16 mm 10.16 mm 10.16 mm
Base Number Matches 1 1 -

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