IS25WP128F-JBLE datasheet, PDF

Datasheet> All Categories > storage> storage> IS25WP128F-JBLE

IS25WP128F-JBLE: DescriptionFlash, 16MX8, PDSO8, SOIC-8; Categorystorage storage; File Size2MB，180 Pages; ManufacturerIntegrated Silicon Solution ( ISSI ); Environmental Compliance

Download Datasheet Parametric Compare View All

IS25WP128F-JBLE Online Shopping

Suppliers	Part Number	Price	MOQ	In stock
	IS25WP128F-JBLE	-	-	View	Buy Now

IS25WP128F-JBLE Overview

Flash, 16MX8, PDSO8, SOIC-8

IS25WP128F-JBLE Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
package instruction	SOP,
Reach Compliance Code	compliant
Factory Lead Time	9 weeks 3 days
Spare memory width	1
Maximum clock frequency (fCLK)	166 MHz
JESD-30 code	S-PDSO-G8
length	5.28 mm
memory density	134217728 bit
Memory IC Type	FLASH
memory width	8
Number of functions	1
Number of terminals	8
word count	16777216 words
character code	16000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	105 °C
Minimum operating temperature	-40 °C
organize	16MX8
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	SQUARE
Package form	SMALL OUTLINE
Parallel/Serial	SERIAL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Programming voltage	1.8 V
Maximum seat height	2.16 mm
Maximum supply voltage (Vsup)	1.95 V
Minimum supply voltage (Vsup)	1.65 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	5.28 mm
Base Number Matches	1

Preview

Download Datasheet

View All

IS25LP128F

128Mb

IS25WP128F

SERIAL FLASH MEMORY WITH 166MHZ MULTI I/O SPI &

QUAD I/O QPI DTR INTERFACE

DATA SHEET

IS25LP128F

IS25WP128F

GENERAL DESCRIPTION

The IS25LP128F and IS25WP128F Serial Flash memory offers a versatile storage solution with high flexibility and

performance in a simplified pin count package. ISSI’s “Industry Standard Serial Interface” Flash is for systems that

require limited space, a low pin count, and low power consumption. The device is accessed through a 4-wire SPI

Interface consisting of a Serial Data Input (SI), Serial Data Output (SO), Serial Clock (SCK), and Chip Enable (CE#)

pins, which can also be configured to serve as multi-I/O (see pin descriptions).

The device supports Dual and Quad I/O as well as standard, Dual Output, and Quad Output SPI. Clock frequencies

of up to 166MHz allow for equivalent clock rates of up to 664MHz (166MHz x 4) which equates to 83Mbytes/s of

data throughput. The IS25xP series of Flash adds support for DTR (Double Transfer Rate) commands that transfer

addresses and read data on both edges of the clock. These transfer rates can outperform 16-bit Parallel Flash

memories allowing for efficient memory access to support XIP (execute in place) operation.

The memory array is organized into programmable pages of 256 bytes. This family supports page program mode

where 1 to 256 bytes of data are programmed in a single command. QPI (Quad Peripheral Interface) supports 2-

cycle instruction further reducing instruction times. Pages can be erased in groups of 4Kbyte sectors, 32Kbyte

blocks, 64Kbyte blocks, and/or the entire chip. The uniform sector and block architecture allows for a high degree

of flexibility so that the device can be utilized for a broad variety of applications requiring solid data retention.

Supply Voltage & Temperature Range vs. Maximum Speed

Voltage & Temp.

IS25LP (3.0V typ.)

IS25WP (1.8V typ.)

2.30~3.6V, 125

°C

2.70~3.6V, 125

°C

1.65~1.95V, 125

°C

1.70~1.95V, 105

°C

Speed

133MHz

166MHz

133MHz

166MHz

(1)

Note:

1. Values are guaranteed by characterization and not 100% tested in production.

Integrated Silicon Solution, Inc.- www.issi.com

Rev.A1

03/05/2018

IS25LP128F

IS25WP128F

TABLE OF CONTENTS

FEATURES ............................................................................................................................................................. 2

GENERAL DESCRIPTION ..................................................................................................................................... 3

TABLE OF CONTENTS.......................................................................................................................................... 4

PIN CONFIGURATION ................................................................................................................................... 7

PIN DESCRIPTIONS....................................................................................................................................... 9

BLOCK DIAGRAM......................................................................................................................................... 11

SPI MODES DESCRIPTION ......................................................................................................................... 12

SYSTEM CONFIGURATION ........................................................................................................................ 14

5.1 BLOCK/SECTOR ADDRESSES ............................................................................................................. 14

5.2 Serial Flash Discoverable Parameters .................................................................................................... 15

REGISTERS .................................................................................................................................................. 20

6.1 STATUS REGISTER ............................................................................................................................... 20

6.2 FUNCTION REGISTER .......................................................................................................................... 25

6.3 READ REGISTER AND EXTENDED REGISTER .................................................................................. 26

6.3.1 READ REGISTER ........................................................................................................................... 26

6.3.2 EXTENDED READ REGISTER ...................................................................................................... 28

6.4 AUTOBOOT REGISTER ......................................................................................................................... 30

6.5 BANK ADDRESS REGISTER ................................................................................................................. 31

6.6 ADVANCED SECTOR/BLOCK PROTECTION (ASP) RELATED REGISTER ...................................... 32

6.6.1 ADVANCED SECTOR/BLOCK PROTECTION REGISTER (ASPR) ............................................. 32

6.6.2 PASSWORD REGISTER ................................................................................................................ 33

6.6.3 PPB LOCK REGISTER ................................................................................................................... 33

6.6.4 PPB REGISTER .............................................................................................................................. 34

6.6.5 DYB REGISTER .............................................................................................................................. 34

PROTECTION MODE ................................................................................................................................... 35

7.1 HARDWARE WRITE PROTECTION ...................................................................................................... 35

7.2 SOFTWARE WRITE PROTECTION ....................................................................................................... 35

7.2.1 BLOCK PROTECTION BITS .......................................................................................................... 35

7.2.2 ADVANCED SECTOR/BLOCK PROTECTION (ASP) .................................................................... 36

DEVICE OPERATION ................................................................................................................................... 43

8.1 COMMAND OVERVIEW ......................................................................................................................... 43

8.2 COMMAND SET SUMMARY .................................................................................................................. 44

8.3 NORMAL READ OPERATION (NORD, 03h or 4NORD, 13h) ................................................................ 52

8.4 FAST READ OPERATION (FRD, 0Bh or 4FRD, 0Ch) ........................................................................... 55

8.5 HOLD OPERATION ................................................................................................................................ 59

8.6 FAST READ DUAL I/O OPERATION (FRDIO, BBh or 4FRDIO, BCh) .................................................. 60

8.7 FAST READ DUAL OUTPUT OPERATION (FRDO, 3Bh or 4FRDO, 3Ch) ........................................... 64

8.8 FAST READ QUAD OUTPUT OPERATION (FRQO, 6Bh or 4FRQO 6Ch) ........................................... 67

Integrated Silicon Solution, Inc.- www.issi.com

Rev.A1

03/05/2018

IS25LP128F

IS25WP128F

8.9 FAST READ QUAD I/O OPERATION (FRQIO, EBh or 4FRQIO, ECh) ................................................. 70

8.10 PAGE PROGRAM OPERATION (PP, 02h or 4PP, 12h) ...................................................................... 77

8.11 QUAD INPUT PAGE PROGRAM OPERATION (PPQ, 32h/38h or 4PPQ, 34h/3Eh)........................... 80

8.12 ERASE OPERATION ............................................................................................................................ 81

8.13 SECTOR ERASE OPERATION (SER, D7h/20h or 4SER, 21h) ........................................................... 82

8.14 BLOCK ERASE OPERATION (BER32K:52h or 4BER32K:5Ch, BER64K:D8h or 4BER64K:DCh) ..... 84

8.15 CHIP ERASE OPERATION (CER, C7h/60h) ........................................................................................ 87

8.16 WRITE ENABLE OPERATION (WREN, 06h) ....................................................................................... 88

8.17 WRITE DISABLE OPERATION (WRDI, 04h) ....................................................................................... 89

8.18 READ STATUS REGISTER OPERATION (RDSR, 05h) ...................................................................... 90

8.19 WRITE STATUS REGISTER OPERATION (WRSR, 01h) ................................................................... 91

8.20 READ FUNCTION REGISTER OPERATION (RDFR, 48h) ................................................................. 92

8.21 WRITE FUNCTION REGISTER OPERATION (WRFR, 42h) ............................................................... 93

8.22 ENTER QUAD PERIPHERAL INTERFACE (QPI) MODE OPERATION (QIOEN, 35h; QIODI,F5h) ... 94

8.23 PROGRAM/ERASE SUSPEND & RESUME ........................................................................................ 95

8.24 ENTER DEEP POWER DOWN (DP, B9h) ........................................................................................... 98

8.25 RELEASE DEEP POWER DOWN (RDPD, ABh) ................................................................................. 99

8.26 SET READ PARAMETERS OPERATION (SRPNV: 65h, SRPV: C0h/63h) ....................................... 100

8.27 SET EXTENDED READ PARAMETERS OPERATION (SERPNV: 85h, SERPV: 83h) ..................... 102

8.28 READ READ PARAMETERS OPERATION (RDRP, 61h) ................................................................. 103

8.29 READ EXTENDED READ PARAMETERS OPERATION (RDERP, 81h) .......................................... 104

8.30 CLEAR EXTENDED READ REGISTER OPERATION (CLERP, 82h) ............................................... 105

8.31 READ PRODUCT IDENTIFICATION (RDID, ABh) ............................................................................. 106

8.32 READ PRODUCT IDENTIFICATION BY JEDEC ID OPERATION (RDJDID, 9Fh; RDJDIDQ, AFh) 108

8.33 READ DEVICE MANUFACTURER AND DEVICE ID OPERATION (RDMDID, 90h) ......................... 109

8.34 READ UNIQUE ID NUMBER (RDUID, 4Bh) ....................................................................................... 110

8.35 READ SFDP OPERATION (RDSFDP, 5Ah) ....................................................................................... 111

8.36 NO OPERATION (NOP, 00h).............................................................................................................. 111

8.37 SOFTWARE RESET (RESET-ENABLE (RSTEN, 66h) AND RESET (RST, 99h)) AND HARDWARE

RESET ......................................................................................................................................................... 112

8.38 SECURITY INFORMATION ROW ...................................................................................................... 113

8.39 INFORMATION ROW ERASE OPERATION (IRER, 64h) .................................................................. 114

8.40 INFORMATION ROW PROGRAM OPERATION (IRP, 62h) .............................................................. 115

8.41 INFORMATION ROW READ OPERATION (IRRD, 68h) .................................................................... 116

8.42 FAST READ DTR MODE OPERATION (FRDTR, 0Dh or 4FRDTR, 0Eh) ......................................... 117

8.43 FAST READ DUAL IO DTR MODE OPERATION (FRDDTR, BDh or 4FRDDTR, BEh) .................... 122

8.44 FAST READ QUAD IO DTR MODE OPERATION IN SPI MODE (FRQDTR, EDh or 4FRQDTR, EEh)

..................................................................................................................................................................... 126

8.45 SECTOR LOCK/UNLOCK FUNCTIONS ............................................................................................ 134

8.46 AUTOBOOT ........................................................................................................................................ 137

Integrated Silicon Solution, Inc.- www.issi.com

Rev.A1

03/05/2018

IS25WP128F-JBLE Related Products

	IS25WP128F-JBLE	IS25LP128F-JLLE	IS25LP128F-JBLE
Description	Flash, 16MX8, PDSO8, SOIC-8	Flash, 16MX8, PDSO8, WSON-8	Flash, 16MX8, PDSO8, SOIC-8
Is it Rohs certified?	conform to	conform to	conform to
package instruction	SOP,	HVSON,	SOP,
Reach Compliance Code	compliant	compliant	compli
Factory Lead Time	9 weeks 3 days	10 weeks	9 weeks 3 days
Spare memory width	1	1	1
Maximum clock frequency (fCLK)	166 MHz	166 MHz	166 MHz
JESD-30 code	S-PDSO-G8	R-PDSO-N8	S-PDSO-G8
length	5.28 mm	8 mm	5.28 mm
memory density	134217728 bit	134217728 bit	134217728 bi
Memory IC Type	FLASH	FLASH	FLASH
memory width	8	8	8
Number of functions	1	1	1
Number of terminals	8	8	8
word count	16777216 words	16777216 words	16777216 words
character code	16000000	16000000	16000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	105 °C	105 °C	105 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C
organize	16MX8	16MX8	16MX8
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	HVSON	SOP
Package shape	SQUARE	RECTANGULAR	SQUARE
Package form	SMALL OUTLINE	SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE
Parallel/Serial	SERIAL	SERIAL	SERIAL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
Programming voltage	1.8 V	3 V	3 V
Maximum seat height	2.16 mm	0.8 mm	2.16 mm
Maximum supply voltage (Vsup)	1.95 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	1.65 V	2.3 V	2.3 V
Nominal supply voltage (Vsup)	1.8 V	3 V	3 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	GULL WING	NO LEAD	GULL WING
Terminal pitch	1.27 mm	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	5.28 mm	6 mm	5.28 mm
Maker	-	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )

Recommended Resources

AM radio automatic search and trigger circuit

Display drive circuit for digital voltmeter

Computer system professional ground wire and dedicated conversion socket wiring

Practical current feedback integrated amplifier 03

300V1000W inverter circuit diagram

STK084 audio IC circuit diagram

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components