®
®
ADS-943
14-Bit, 3MHz, Low-Distortion, Sampling A/D Converters
PRODUCT OVERVIEW
The low-cost ADS-943 is a 14-bit, 3MHz
sampling A/D converter optimized to meet the
demanding dynamic-range and sampling-rate
requirements of contemporary digital telecommu-
nications applications. The ADS-943's outstanding
dynamic performance is evidenced by a peak har-
monic specification of –83dB and a signal-to-noise
ratio (SNR) of 79dB. Additionally, the ADS-943
easily achieves the 2.2MHz minimum sampling
rate required by digital receivers in certain ADSL,
HDSL and ATM applications. The ADS-943 also
addresses size and power constraints normally
associated with these types of applications. This
device requires just ±5V supplies, dissipates 1.7
Watts, and is packaged in a very small 24-pin DDIP.
Although optimized for frequency-domain
applications, the ADS-943's DNL and noise speci-
fications are also outstanding, thereby making
it an equally impressive device for time-domain
applications (graphic and medical imaging, pro-
cess control, etc.). In fact, the ADS-943 guarantees
no missing codes to the 14-bit level over the full
HI-REL operating temperature range.
The functionally complete ADS-943 contains a
fast-settling sample-hold amplifier, a subranging
(two-pass) A/D converter, an internal reference,
timing/control logic, and error-correction circuitry.
Digital input and output levels are TTL. The unit
is edge-triggered, requiring only the rising edge
of a start convert pulse to initiate a conversion.
The device is offered with a bipolar input range
of ±2V. Models are available in commercial (0 to
+70°C), industrial (–40 to +100°C), or HI-REL (–55
to +125°C) operating temperature ranges. A pro-
prietary, auto-calibrating, error-correcting circuit
allows the device to achieve specified performance
over the full HI-REL temperature range.
FEATURES
14-bit resolution
3MHz minimum sampling rate
for both frequency and time-domain
Ideal
applications
Excellent peak harmonics, –83dB
Excellent signal-to-noise ratio, 79dB
missing codes over full HI-REL temperature
No
range
supplies, 1.7 Watts
±5V
Small, 24-pin ceramic DDIP or SMT
cost
Low
BLOCK DIAGRAM
OFFSET ADJUST 23
PIN
1
2
3
4
5
6
7
8
9
10
11
12
INPUT/OUTPUT CONNECTIONS
FUNCTION
PIN FUNCTION
BIT1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
24
23
22
21
20
19
18
17
16
15
14
13
ANALOG GROUND
OFFSET ADJUST
+5V ANALOG SUPPLY
ANALOG INPUT
–5V SUPPLY
ANALOG GROUND
START CONVERT
EOC
BIT 14 (LSB)
BIT 13
DIGITAL GROUND
+5V DIGITAL SUPPLY
BUFFER
REGISTER
ANALOG INPUT 21
–
S/H
+
FLASH
ADC
1
16 BIT 14 (LSB)
15 BIT 13
12 BIT 12
DIGITAL CORRECTION LOGIC
11 BIT 11
OUTPUT REGISTER
10 BIT 10
9
8
7
6
5
4
3
2
1
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1 (MSB)
POWER AND GROUNDING
REF
+5V ANALOG SUPPLY
+5V DIGITAL SUPPLY
DIGITAL GROUND
–5V SUPPLY
ANALOG GROUND
22
13
14
20
19, 24
AMP
FLASH
ADC
2
REGISTER
DAC
START CONVERT 18
EOC 17
TIMING AND
CONTROL LOGIC
Figure 1. ADS-943 Functional Block Diagram
DATEL
•
11 Cabot Boulevard, Mansfield, MA 02048-1151 USA •
Tel: (508) 339-3000
•
www.datel.com
• e-mail: help@datel.com
30 Apr 2013 MDA_ADS-943.C02
Page 1 of 9
®
®
ADS-943
14-Bit, 3MHz, Low-Distortion, Sampling A/D Converters
UNITS
Volts
Volts
Volts
Volts
Volts
°C
PHYSICAL/ENVIRONMENTAL
PARAMETERS
MIN.
TYP.
MAX.
UNITS
Operating Temp. Range, Case
ADS-943MC, GC, MC-C, GC-C
0
—
+70
°C
ADS-943ME, GE, ME-C, GE-C
–40
—
+100
°C
ADS-943MM, GM, MM-C, GM-C
–55
—
+125
°C
ADS-943MM-QL, 883, MM-QL-C, 883-C
–55
—
+125
°C
Thermal Impedance
jc
—
6
—
°C/Watt
ca
—
24
—
°C/Watt
Storage Temperature Range
–65
—
+150
°C
Package Type
24-pin, metal-sealed, ceramic DDIP or SMT
Weight
0.42 ounces (12 grams)
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
LIMITS
+12V/+15V Supply (Pin 22)
0 to +6
–12V/–15V Supply (Pin 24)
0 to –6
+5V Supply (Pin 13)
0 to +6
Digital Input (Pin 16)
–0.3 to +V
DD
+0.3
Analog Input (Pin 20)
±5
Lead Temperature (10 seconds)
+300
FUNCTIONAL SPECIFICATIONS
(T
A
= +25°C, +V
DD
= +5V, 3MHz sampling rate, and a minimum 3 minute warmup
➀
unless otherwise specified.)
ANALOG INPUT
Input Voltage Range
Input Resistance
Input Capacitance
DIGITAL INPUT
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Start Convert Positive Pulse Width
➂
STATIC PERFORMANCE
Resolution
Integral Nonlinearity (fin = 10kHz)
Differential Nonlinearity (fin = 10kHz)
Full Scale Absolute Accuracy
Bipolar Zero Error (Tech Note 2)
Gain Error (Tech Note 2)
No Missing Codes (fin = 10kHz)
No Missing Codes (f
in
= 10kHz)
DYNAMIC PERFORMANCE
Peak Harmonics (–0.5dB)
dc to 500kHz
500kHz to 1MHz
1MHz to 1.5MHz
Total Harmonic Distortion (–0.5dB)
dc to 500kHz
500kHz to 1MHz
1MHz to 1.5MHz
Signal-to-Noise Ratio (w/o distortion, –0.5dB)
dc to 500kHz
500kHz to 1MHz
1MHz to 1.5MHz
Signal-to-Noise Ratio
(& distortion, –0.5dB)
dc to 500kHz
500kHz to 1MHz
1MHz to 1.5MHz
Noise
Two-Tone Intermodulation Distortion
(fin = 975kHz, 1.2MHz, fs = 3MHz, –0.5dB)
Input Bandwidth (–3dB)
Small Signal (–20dB input)
Large Signal (–0dB input)
Feedthrough Rejection (fin = 1.5MHz)
Slew Rate
Aperture Delay Time
Aperture Uncertainty
S/H Acquisition Time ( to ±0.003%FSR, 4V step)
Overvoltage Recovery Time
➄
A/D Conversion Rate
DATEL
MIN.
—
—
—
+25°C
TYP.
±2
280
6
MAX.
—
—
15
MIN.
—
—
—
0 TO +70°C
TYP.
±2
280
6
MAX.
—
—
15
MIN.
—
—
—
–55 TO +125°C
TYP.
±2
280
6
MAX.
—
—
15
UNITS
Volts
pF
+2.0
—
—
—
10
—
—
–0.95
—
—
—
14
14
—
—
—
—
20
14
±0.75
±0.5
±0.15
±0.1
±0.2
—
—
—
+0.8
+20
–20
—
—
—
+1.25
±0.4
±0.3
±0.5
—
—
+2.0
—
—
—
10
—
—
–0.95
—
—
—
14
14
—
—
—
—
20
14
±0.75
±0.5
±0.15
±0.1
±0.2
—
—
—
+0.8
+20
–20
—
—
—
+1.25
±0.4
±0.3
±0.5
—
—
+2.0
—
—
—
10
—
—
–0.95
—
—
—
14
14
—
—
—
—
20
14
±1
±0.75
±0.4
±0.3
±0.4
—
—
—
+0.8
+20
–20
—
—
—
+1.5
±0.6
±0.6
±1.25
—
—
Volts
Volts
μA
μA
Bits
LSB
LSB
%FSR
%FSR
%
Bits
Bits
—
—
—
—
—
—
76
76
75
73
73
73
—
—
—
—
—
—
—
—
—
—
3
•
–83
–83
–83
–80
–80
–80
79
79
78
77
77
77
125
–82
30
10
85
±400
+5
2
208
100
—
–77
–77
–77
–76
–76
–76
—
—
—
—
—
—
—
—
—
—
—
—
—
—
215
333
—
—
—
—
—
—
—
76
76
75
73
73
73
—
—
—
—
—
—
—
—
—
—
3
–83
–83
–83
–80
–80
–80
79
79
78
77
77
77
125
–82
30
10
85
±400
+5
2
208
100
—
–77
–77
–77
–76
–76
–76
—
—
—
—
—
—
—
—
—
—
—
—
—
—
215
333
—
Tel: (508) 339-3000
—
—
—
—
—
—
75
74
74
71
71
71
—
—
—
—
—
—
—
—
—
—
3
•
–81
–81
–81
–78
–77
–77
78
77
77
75
75
74
125
–82
30
10
85
±400
+5
2
208
100
—
www.datel.com
–75
–75
–75
–74
–73
–73
—
—
—
—
—
—
—
—
—
—
—
—
—
—
215
333
—
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
μVrms
dB
MHz
MHz
dB
V/μs
ns
ps rms
ns
ns
MHz
11 Cabot Boulevard, Mansfield, MA 02048-1151 USA •
• e-mail: help@datel.com
30 Apr 2013 MDA_ADS-943.C02
Page 2 of 9
®
®
ADS-943
14-Bit, 3MHz, Low-Distortion, Sampling A/D Converters
+25°C
TYP.
—
—
—
—
MAX.
—
+0.4
–4
+4
MIN.
+2.4
—
—
—
0 TO +70°C
TYP.
MAX.
MIN.
+2.4
—
—
—
–55 TO +125°C
TYP.
—
—
—
—
MAX.
—
+0.4
–4
+4
UNITS
Volts
Volts
mA
mA
DIGITAL OUTPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Output Coding
POWER REQUIREMENTS
Power Supply Ranges➅
+5V Supply
–5V Supply
Power Supply Currents
+5V Supply
–5V Supply
Power Dissipation
Power Supply Rejection
MIN.
+2.4
—
—
—
—
—
—
+0.4
—
–4
—
+4
Offset Binary
+4.75
–4.75
—
—
—
—
+5.0
–5.0
+210
–180
1.7
—
+5.25
–5.25
+230
–195
2.0
±0.05
+4.75
–4.75
—
—
—
—
+5.0
–5.0
+210
–180
1.7
—
+5.25
–5.25
+230
–195
2.0
±0.05
+4.9
–4.9
—
—
—
—
+5.0
–5.0
+210
–180
1.7
—
+5.25
–5.25
+230
–195
2.0
±0.05
Volts
Volts
mA
mA
Watts
%FSR/%V
Footnotes:
➀
All power supplies must be on before applying a start convert pulse. All supplies and
the clock (START CONVERT) must be present during warmup periods. The device
must be continuously converting during this time.
➁
Contact DATEL for availability of other input voltage ranges.
➂
A 3MHz clock with a 20nsec positive pulse width is used for all production testing.
When sampling at 3MHz, the start convert pulse must be between 10 and 110nsec
wide or between 160 and 300nsec wide. The falling edge must not occur between
110 and 160nsec. For lower sampling rates, wider start pulses may be used.
➃
Effective bits is equal to:
(SNR + Distortion) – 1.76 +
20 log
6.02
➄
This is the time required before the A/D output data is valid after the analog input is
back within the specified range. This time is only guaranteed if the input does not
exceed ±2.2V (S/H Saturation Voltage).
➅
The minimum supply voltages of +4.9V and –4.9V for ±VDD are required for –55°C
operation only. The minumum limits are +4.75V and –4.75V when operating at +125°C.
Full Scale Amplitude
Actual Input Amplitude
TECHNICAL NOTES
1. Obtaining fully specified performance from the ADS-943 requires care-
ful attention to pc-card layout and power supply decoupling. The device's
analog and digital ground systems are connected to each other internally.
For optimal performance, tie all ground pins (14, 19 and 24) directly to a
large
analog
ground plane beneath the package.
Bypass all power supplies to ground with 4.7μF tantalum capacitors in
parallel with 0.1μF ceramic capacitors. Locate the bypass capacitors as
close to the unit as possible.
2. The ADS-943 achieves its specified accuracies without the need for exter-
nal calibration. If required, the device's small initial offset and gain errors
can be reduced to zero using the adjustment circuitry shown in Figures 2
and 3. When using this circuitry, or any similar offset and gain-calibration
hardware, make adjustments following warmup. To avoid interaction,
always adjust offset before gain.
3. Applying a start convert pulse while a conversion is in progress (EOC =
logic "1") will initiate a new and inaccurate conversion cycle. Data for the
interrupted and subsequent conversions will be invalid.
4. A passive bandpass filter is used at the input of the A/D for all production
testing.
2k
GAIN
ADJUST
1.98k
50
To Pin21
of ADS-943
+5V
SIGNAL
INPUT
–5V
Figure 2. Optional ADS-943 Gain
Adjust Calibration Circuit
DATEL
•
11 Cabot Boulevard, Mansfield, MA 02048-1151 USA •
Tel: (508) 339-3000
•
www.datel.com
• e-mail: help@datel.com
30 Apr 2013 MDA_ADS-943.C02
Page 3 of 9
®
®
ADS-943
14-Bit, 3MHz, Low-Distortion, Sampling A/D Converters
Gain Adjust Procedure
1. Apply +1.99963V to the ANALOG INPUT (pin 21).
2. Adjust the gain potentiometer until all output bits are 1's and the LSB
flickers between 1 and 0.
3. To confirm proper operation of the device, vary the input signal to obtain
the output coding listed in Table 2.
Table 1. Gain and Zero Adjust
INPUT VOLTAGE
RANGE
±2V
ZERO ADJUST
+½ LSB
+122μV
GAIN ADJUST
+FS –1½ LSB
+1.99963V
CALIBRATION PROCEDURE
Any offset and/or gain calibration procedures should not be implemented
until devices are fully warmed up. To avoid interaction, offset must be
adjusted before gain. The ranges of adjustment for the circuits in Figures
2 and 3 are guaranteed to compensate for the ADS-943's initial accuracy
errors and may not be able to compensate for additional system errors.
A/D converters are calibrated by positioning their digital outputs exactly
on the transition point between two adjacent digital output codes. This can
be accomplished by connecting LED's to the digital outputs and adjusting
until certain LED's "flicker" equally between on and off. Other approaches
employ digital comparators or microcontrollers to detect when the outputs
change from one code to the next.
Offset adjusting for the ADS-943 is normally accomplished at the point
where the MSB is a 1 and all other output bits are 0's and the LSB just
changes from a 0 to a 1. This digital output transition ideally occurs when
the applied analog input is +½ LSB (+122μV).
Gain adjusting is accomplished when all bits are 1's and the LSB just
changes from a 1 to a 0. This transition ideally occurs when the analog
input is at +full scale minus 1½ LSB's (+1.99963V).
Zero/Offset Adjust Procedure
1. Apply a train of pulses to the START CONVERT input (pin 18) so the con-
verter is continuously converting.
2. Apply +122μV to the ANALOG INPUT (pin 21).
3. Adjust the offset potentiometer until the output bits are 10 0000 0000
0000 and the LSB flickers between 0 and 1.
–5V
Table 2. Output Coding for Bipolar Operation
BIPOLAR SCALE
+FS – 1 LSB
+3/4FS
+1/2FS
0
–1/2 FS
–3/4 FS
–FS +1 LSB
–FS
INPUT VOLTAGE
(±2V RANGE)
+1.99976
+1.50000
+1.00000
0.00000
–1.00000
–1.50000
1.99976
–2.00000
OFFSET BINARY
MSB
LSB
11 1111 1111 1111
11 1000 0000 0000
11 0000 0000 0000
10 0000 0000 0000
01 0000 0000 0000
00 1000 0000 0000
00 0000 0000 0001
00 0000 0000 0000
+5V
4.7μF
+
0.1μF
19
ANALOG
INPUT
+5V
ZERO/
OFFSET
ADJUST
–5V
START
CONVERT
18
20
4.7μF 4.7μF
+ +
0.1μF
0.1μF
24
22, 13
14
21
23
20k
ADS-943
1
2
3
4
5
6
7
8
9
10
11
12
15
16
17
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
BIT 13
BIT 14 (LSB)
EOC
A single +5V supply should be used for both the +5V analog and +5V digital.
If separate supplies are used, the difference between the two cannot exceed 100mV.
Figure 3. Connection Diagram
DATEL
•
11 Cabot Boulevard, Mansfield, MA 02048-1151 USA •
Tel: (508) 339-3000
•
www.datel.com
• e-mail: help@datel.com
30 Apr 2013 MDA_ADS-943.C02
Page 4 of 9
®
®
ADS-943
14-Bit, 3MHz, Low-Distortion, Sampling A/D Converters
devices do not overheat. The ground and power planes beneath the package,
as well as all pcb signal runs to and from the device, should be as heavy as
possible to help conduct heat away from the package.
Electrically-insulating, thermally-conductive "pads" may be installed
underneath the package. Devices should be soldered to boards rather than
"socketed," and of course, minimal air flow over the surface can greatly help
reduce the package temperature.
THERMAL REQUIREMENTS
All DATEL sampling A/D converters are fully characterized and speci-
fied over operating temperature (case) ranges of 0 to +70°C and –55
to +125°C. All room-temperature (T
A
= +25°C) production testing is
performed without the use of heat sinks or forced-air cooling. Thermal
impedance figures for each device are listed in their respective specifica-
tion tables.
These devices do not normally require heat sinks; however, standard
precautionary design and layout procedures should be used to ensure
N
START
CONVERT
20ns typ.
333nsec
10ns typ.
INTERNAL S/H
125ns typ.
Hold
Acquisition Time
208ns typ.
215ns max.
N+1
125ns typ.
35ns typ.
EOC
130ns
Conversion Time
120ns min., 130ns typ.,
140ns max.
30ns typ.
10ns max.
OUTPUT
DATA
Data N-1 Valid
Data N Valid
283ns typ.
Invalid
Data
Data N+1 Valid
50ns typ.
Note: 1. Scale is approximately 20ns per division. Sampling rate = 3MHz.
2. The start convert positive pulse width must be between either 10 and 110nsec or
160 and 300nsec (when sampling at 3MHz) to ensure proper operation. For sampling
rates lower than 3MHz, the start pulse can be wider than 300nsec, however a minimum
pulse width low of 30nsec should be maintained. A 3MHz clock with a 20nsec positive
pulse width is used for all production testing.
Figure 4. ADS-943 Timing Diagram
DATEL
•
11 Cabot Boulevard, Mansfield, MA 02048-1151 USA •
Tel: (508) 339-3000
•
www.datel.com
• e-mail: help@datel.com
30 Apr 2013 MDA_ADS-943.C02
Page 5 of 9
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