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MT5C2568LECW-35/XT

Description
Standard SRAM, 32KX8, 35ns, CMOS, CQCC32, CERAMIC, LCC-32
Categorystorage    storage   
File Size324KB,15 Pages
ManufacturerMicross
Websitehttps://www.micross.com
Download Datasheet Parametric View All

MT5C2568LECW-35/XT Overview

Standard SRAM, 32KX8, 35ns, CMOS, CQCC32, CERAMIC, LCC-32

MT5C2568LECW-35/XT Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
Parts packaging codeQFJ
package instructionQCCN,
Contacts32
Reach Compliance Codecompliant
ECCN code3A001.A.2.C
Maximum access time35 ns
JESD-30 codeR-CQCC-N32
JESD-609 codee0
length13.97 mm
memory density262144 bit
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of terminals32
word count32768 words
character code32000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize32KX8
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeQCCN
Package shapeRECTANGULAR
Package formCHIP CARRIER
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height3.048 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formNO LEAD
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width11.43 mm
Base Number Matches1
SRAM
Austin Semiconductor, Inc.
32K x 8 SRAM
SRAM MEMORY ARRAY
AVAILABLE AS MILITARY
SPECIFICATIONS
•SMD 5962-88662
•MIL-STD-883
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ1
DQ2
DQ3
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
MT5C2568
PIN ASSIGNMENT
(Top View)
28-PIN SOJ (ECJ)
28-Pin DIP (C, CW)
V
CC
WE\
A13
A8
A9
A11
OE\
A10
CE\
DQ8
DQ7
DQ6
DQ5
DQ4
32-Pin LCC (ECW)
4 3 2 1 32 31 30
FEATURES
Access Times: 12, 15, 20, 25, 35, 45, 55, 70, & 100ns
Battery Backup: 2V data retention
Low power standby
High-performance, low-power CMOS double-metal process
Single +5V (+10%) Power Supply
Easy memory expansion with CE\
All inputs and outputs are TTL compatible
A6
A5
A4
A3
A2
A1
A0
NC
DQ1
5
6
7
8
9
10
11
12
13
A7
A12
A14
NC
V
CC
WE\
A13
29
28
27
26
25
24
23
22
21
A8
A9
A11
NC
OE\
A10
CE\
DQ8
DQ7
14 15 16 17 18 19 20
OPTIONS
Timing
12ns access
1
15ns access
1
20ns access
25ns access
35ns access
45ns access
55ns access
2
70ns access
2
100ns access
Package(s)
3
Ceramic DIP (300 mil)
Ceramic DIP (600 mil)
Ceramic LCC (28 leads)
Ceramic LCC (32 leads)
Ceramic Flat Pack
Ceramic SOJ
Operating Temperature Ranges
Military -55
o
C to +125
o
C
Industrial -40
o
C to +85
o
C
• 2V data retention/low power
MARKING
-12
-15
-20
-25
-35
-45
-55
-70
-100
4
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ1
DQ2
DQ3
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28-Pin Flat Pack (F)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
WE\
A13
A8
A9
A11
OE\
A10
CE\
DQ8
DQ7
DQ6
DQ5
DQ4
3 2 1 28 27
A6
A5
A4
A3
A2
A1
A0
DQ1
DQ2
4
5
6
7
8
9
10
11
12
A7
A12
A14
V
CC
WE\
26
25
24
23
22
21
20
19
18
DQ2
DQ3
V
SS
NC
DQ4
DQ5
DQ6
28-Pin LCC (EC)
A13
A8
A9
A11
OE\
A10
CE\
DQ8
DQ7
13 14 15 16 17
C
CW
EC
ECW
F
ECJ
No. 108
No. 110
No. 204
No. 208
No. 302
No. 500
GENERAL DESCRIPTION
The Austin Semiconductor SRAM family employs
high-speed, low power CMOS designs using a four-transistor
memory cell. These SRAMs are fabricated using double-layer
metal, double-layer polysilicon technology.
For flexibility in high-speed memory applications, Aus-
tin Semiconductor offers chip enable (CE\) and output enable
(OE\) capability. These enhancements can place the outputs in
High-Z for additional flexibility in system design.
Writing to these devices is accomplished when write
enable (WE\) and CE\ inputs are both LOW. Reading is accom-
plished when WE\ remains HIGH and CE\ and OE\ go LOW.
The device offers a reduced power standby mode when dis-
abled. This allows system designs to achieve low standby
power requirements.
The “L” version provides a battery backup/low volt-
age data retention mode, offering 2mW maximum power dissi-
pation at 2 volts. All devices operate from a single +5V power
supply and all inputs and outputs are fully TTL compatible.
XT
IT
L
NOTES:
1. -12 and -15 available in IT only.
2. Electrical characteristics identical to those provided for the
45ns access devices.
3. Plastic SOJ (DJ Package) is available on the AS5C2568 datasheet.
4. Available in CW, ECW, and F packages only.
For more products and information
please visit our web site at
www.austinsemiconductor.com
MT5C2568
Rev. 1.0 9/99
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
DQ3
V
SS
DQ4
DQ5
DQ6
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