OR2T04A-7J160 datasheet, PDF - EEWORLD Datasheet

OR2T04A-7J160: DescriptionField Programmable Gate Array, 100 CLBs, 4800 Gates, 10MHz, 400-Cell, CMOS, PQFP160; CategoryProgrammable logic devices Programmable logic; File Size8MB，167 Pages; ManufacturerLSC/CSI; Websitehttps://lsicsi.com

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OR2T04A-7J160 Overview

Field Programmable Gate Array, 100 CLBs, 4800 Gates, 10MHz, 400-Cell, CMOS, PQFP160

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
package instruction	QFP, QFP160,1.2SQ
Reach Compliance Code	unknown
Other features	TYP. GATES = 4800 TO 11000
maximum clock frequency	10 MHz
Combined latency of CLB-Max	1.1 ns
JESD-30 code	S-PQFP-G160
JESD-609 code	e0
Configurable number of logic blocks	100
Equivalent number of gates	4800
Number of entries	126
Number of logical units	400
Output times	126
Number of terminals	160
Maximum operating temperature	70 °C
Minimum operating temperature
organize	100 CLBS, 4800 GATES
Package body material	PLASTIC/EPOXY
encapsulated code	QFP
Encapsulate equivalent code	QFP160,1.2SQ
Package shape	SQUARE
Package form	FLATPACK
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.635 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
Base Number Matches	1

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