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BS616UV1010ACCP10

Description
SRAM
Categorystorage    storage   
File Size146KB,9 Pages
ManufacturerBrilliance
Download Datasheet Parametric View All

BS616UV1010ACCP10 Overview

SRAM

BS616UV1010ACCP10 Parametric

Parameter NameAttribute value
package instruction,
Reach Compliance Codeunknown
Base Number Matches1
BSI
n
FEATURES
Ultra Low Power/Voltage CMOS SRAM
64K X 16 bit
n
DESCRIPTION
BS616UV1010
Ÿ
Ultra low V
CC
operation voltage : 1.9V ~ 3.6V
Ÿ
Very low power consumption :
V
CC
= 2.0V
10mA(Max.) operating current
0.01uA (Typ.) CMOS standby current
V
CC
= 3.0V
18mA(Max.) operating current
0.02uA (Typ.) CMOS standby current
Ÿ
High speed access time :
-10
100ns(Max.)
Ÿ
Automatic power down when chip is deselected
Ÿ
Easy expansion with CE and OE options
Ÿ
I/O Configuration x8/x16 selectable by LB and UB pin.
Ÿ
Three state outputs and TTL compatible
Ÿ
Fully static operation
Ÿ
Data retention supply voltage as low as 1.5V
The BS616UV1010 is a high performance, ultra low power CMOS Static
Random Access Memory organized as 65,536 words by 16 bits and
operates form a wide range of 1.9V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with typical CMOS standby current of
0.01uA and maximum access time of 100ns in 1.9V operation.
Easy memory expansion is provided by an active LOW chip enable (CE)
and active LOW output enable (OE) and three-state output drivers.
The BS616UV1010 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS616UV1010 is available in JEDEC standard 44-pin TSOP II and
48-ball BGA package.
n
PRODUCT FAMILY
POWER DISSIPATION
PRODUCT
FAMILY
BS616UV1010EC
BS616UV1010AC
BS616UV1010EI
BS616UV1010AI
-40
O
C to +85
O
C
1.9V ~ 3.6V
100
1.5uA
1.0uA
20mA
15mA
OPERATING
TEMPERATURE
+0
O
C to +70
O
C
V
CC
RANGE
SPEED
(ns)
STANDBY
(I
CCSB1
, Max)
Operating
(I
CC
, Max)
PKG TYPE
TSOP2-44
BGA-48-0608
TSOP2-44
BGA-48-0608
V
CC
=3.0V
V
CC
=2.0V
V
CC
=3.0V
V
CC
=2.0V
1.9V ~ 3.6V
100
1.0uA
0.5uA
20mA
15mA
n
PIN CONFIGURATIONS
A4
A3
A2
A1
A0
CE
DQ0
DQ1
DQ2
DQ3
VCC
VSS
DQ4
DQ5
DQ6
DQ7
WE
A15
A14
A13
A12
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
DQ15
DQ14
DQ13
DQ12
VSS
VCC
DQ11
DQ10
DQ9
DQ8
NC
A8
A9
A10
A11
NC
n
BLOCK DIAGRAM
A8
A13
A15
A14
A12
A7
A6
A5
A4
2048
DQ0
.
.
.
.
.
.
DQ15
16
.
.
.
.
.
.
Data
Input
Buffer
16
128
Column Decoder
14
Control
Address Input Buffer
16
Column I/O
Write Driver
Sense Amp
Address
Input
Buffer
18
Row
Decoder
512 x 2048
512
Memory Array
BS616UV1010EC
BS616UV1010EI
1
A
B
C
D
E
F
G
H
UB
D8
D9
VSS
VCC
D14
D15
NC
2
OE
LB
D10
D11
D12
D13
NC
A8
3
A0
A3
A5
NC
NC
A14
A12
A9
4
A1
A4
A6
A7
NC
A15
A13
A10
5
A2
CE
D1
D3
D4
D5
WE
A11
6
NC
D0
D2
VCC
VSS
D6
D7
NC
16
Data
Output
Buffer
CE
WE
OE
UB
LB
V
CC
V
SS
A11 A9
A3
A2
A1
A0 A10
48-ball BGA top view
Brilliance Semiconductor, Inc.
reserves the right to modify document contents without notice.
R0201-BS616UV1010
1
Revision 2.4
May.
2005
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