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BS62LV2563JC70

Description
Standard SRAM, 32KX8, 70ns, CMOS, PDSO28
Categorystorage    storage   
File Size373KB,10 Pages
ManufacturerBrilliance
Download Datasheet Parametric View All

BS62LV2563JC70 Overview

Standard SRAM, 32KX8, 70ns, CMOS, PDSO28

BS62LV2563JC70 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
package instructionSOJ, SOJ28,.34
Reach Compliance Codeunknown
Maximum access time70 ns
I/O typeCOMMON
JESD-30 codeR-PDSO-J28
JESD-609 codee0
memory density262144 bit
Memory IC TypeSTANDARD SRAM
memory width8
Humidity sensitivity level3
Number of terminals28
word count32768 words
character code32000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize32KX8
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSOJ
Encapsulate equivalent codeSOJ28,.34
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
power supply3/3.3 V
Certification statusNot Qualified
Maximum standby current2e-7 A
Minimum standby current1.5 V
Maximum slew rate0.02 mA
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationDUAL
Base Number Matches1
BSI
FEATURES
Very Low Power/Voltage CMOS SRAM
32K X 8 bit
DESCRIPTION
BS62LV2563
• Wide Vcc operation voltage : 2.4V ~ 3.6V
• Very low power consumption :
Vcc = 3.0V C-grade : 20mA (Max.) operating current
I- grade : 25mA (Max.) operating current
0.01uA (Typ.) CMOS standby current
• High speed access time :
-70
70ns (Max.) at Vcc = 3.0V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE and OE options
The BS62LV2563 is a high performance , very low power CMOS
Static Random Access Memory organized as 32,768 words by 8 bits
and operates from a wide range of 2.4V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current of
0.01uA and maximum access time of 70ns in 3V operation.
Easy memory expansion is provided by an active LOW chip enable(CE)
,and active LOW output enable(OE) and three-state output drivers.
The BS62LV2563 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS62LV2563 is available in the JEDEC standard 28 pin 330mil
Plastic SOP, 300mil Plastic SOJ, 600mil Plastic DIP and 8mmx13.4mm
TSOP (normal type).
PRODUCT FAMILY
PRODUCT
FAMILY
BS62LV2563SC
BS62LV2563TC
BS62LV2563PC
BS62LV2563JC
BS62LV2563DC
BS62LV2563SI
BS62LV2563TI
BS62LV2563PI
BS62LV2563JI
BS62LV2563DI
OPERATING
TEMPERATURE
Vcc
RANGE
SPEED
(ns)
Vcc=3.0V
POWER DISSIPATION
STANDBY
Operating
(I
CCSB1
, Max)
Vcc=3.0V
(I
CC
, Max)
Vcc=3.0V
PKG
TYPE
SOP-28
TSOP-28
PDIP-28
SOJ-28
DICE
SOP-28
TSOP-28
PDIP-28
SOJ-28
DICE
0 C to +70 C
O
O
2.4V ~ 3.6V
70
0.2uA
20mA
-40 C to +85 C
O
O
2.4V ~ 3.6V
70
0.4uA
25mA
PIN CONFIGURATIONS
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
1
2
3
4
28
27
26
25
BLOCK DIAGRAM
VCC
WE
A13
A8
A9
A11
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
8
Data
Input
Buffer
8
A5
A6
A7
A12
A14
A13
A8
A9
A11
Buffer
5
BS62LV2563SC
24
6
BS62LV2563SI
23
7
BS62LV2563PI
8
9
10
11
12
13
14
BS62LV2563PC
BS62LV2563JC
BS62LV2563JI
Address
Input
18
Row
Decoder
512
Memory Array
512 x 512
22
21
20
19
18
17
16
15
512
Column I/O
Write Driver
Sense Amp
64
Column Decoder
12
CE
WE
OE
Vdd
Gnd
A4 A3 A2 A1 A0 A10
Control
Address Input Buffer
OE
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
BS62LV2563TC
BS62LV2563TI
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
GND
DQ2
DQ1
DQ0
A0
A1
A2
8
Data
Output
Buffer
8
Brilliance Semiconductor, Inc
.
reserves the right to modify document contents without notice.
R0201-BS62LV2563
1
Revision 2.3
Jan.
2004
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