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BU-61582G2-841

Description
Mil-Std-1553 Controller, 2 Channel(s), CMOS, CDSO70, CERAMIC PACKAGE-70
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size78KB,8 Pages
ManufacturerData Device Corporation
Download Datasheet Parametric View All

BU-61582G2-841 Overview

Mil-Std-1553 Controller, 2 Channel(s), CMOS, CDSO70, CERAMIC PACKAGE-70

BU-61582G2-841 Parametric

Parameter NameAttribute value
Parts packaging codeSOIC
package instructionSOP,
Contacts70
Reach Compliance Codeunknown
Address bus width16
boundary scanNO
letter of agreementMIL-STD-1553
External data bus width16
JESD-30 codeR-CDSO-G70
JESD-609 codee0
low power modeNO
Number of serial I/Os2
Number of terminals70
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Certification statusNot Qualified
Maximum seat height5.461 mm
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
uPs/uCs/peripheral integrated circuit typeSERIAL IO/COMMUNICATION CONTROLLER, MIL-STD-1553
Base Number Matches1
BU-61582
SPACE LEVEL MIL-STD-1553 BC/RT/MT
ADVANCED COMMUNICATION ENGINE
ACE User’s Guide
Also Available
NOW
MEETS
1 MRAD
!
DESCRIPTION
DDC’s BU-61582 Space Advanced
Communication Engine (SP’ACE) is a
radiation hardened version of the BU-
61580 ACE terminal. DDC is able to
supply the BU-61582 with enhanced
screening for space and other high
reliability applications.
The BU-61582 provides a complete
integrated
BC/RT/MT
interface
between a host processor and a MIL-
STD-1553 bus. The BU-61582 pro-
vides functional and software compat-
ibility with the standard BU-61580
product and is packaged in the same
1.9-square-inch package footprint.
As an option, DDC can supply the
BU-61582 with space level screening.
This entails enhancements in the
areas of element evaluation and
screening procedures for active and
passive elements, as well as the man-
ufacturing and screening processes
used in producing the terminals.
The BU-61582 integrates dual trans-
ceiver, protocol, memory manage-
ment and processor interface logic,
and 16K words of RAM in the choice
of 70-pin DIP or flat pack packages.
Transceiverless versions may be
used with an external electrical or
fiber optic transceiver.
To minimize board space and ‘glue’
logic, the SP’ACE terminals provide
ultimate flexibility in interfacing to a
host processor and internal/external
RAM.
FEATURES
• Radiation-Hardened to 1 MRad
• Fully Integrated 1553 Terminal
• Flexible Processor Interface
• 16K x 16 Internal RAM
• Automatic BC Retries
• Programmable BC Gap Times
• BC Frame Auto-Repeat
• Intelligent RT Data Buffering
• Small Ceramic Package
• Available to SMD 5962-96887
16K X 16
SHARED
RAM
CH. A
TRANSCEIVER
A
DATA
BUFFERS
PROCESSOR
DATA BUS
DATA BUS
DUAL
ENCODER/DECODER,
MULTIPROTOCOL
AND
MEMORY
MANAGEMENT
D15-D0
ADDRESS BUS
ADDRESS
BUFFERS
A15-A0
PROCESSOR
ADDRESS BUS
CH. B
TRANSCEIVER
B
RT ADDRESS
RTAD4-RTAD0, RTADP
PROCESSOR
AND
MEMORY
INTERFACE
LOGIC
TRANSPARENT/BUFFERED, STRBD, SELECT,
RD/WR, MEM/REG, TRIGGER_SEL/MEMENA-IN,
MSB/LSB/DTGRT
IOEN, MEMENA-OUT, READYD
ADDR_LAT/MEMOE, ZERO_WAIT/MEMWR,
8/16-BIT/DTREQ, POLARITY_SEL/DTACK
INT
PROCESSOR
AND
MEMORY
CONTROL
INTERRUPT
REQUEST
INCMD
MISCELLANEOUS
CLK_IN, TAG_CLK,
MSTCLR,SSFLAG/EXT_TRG
FIGURE 1. BU-61582 BLOCK DIAGRAM
©
1995, 1999 Data Device Corporation
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