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C1632X7R1C105KT

Description
Ceramic Capacitor, Multilayer, Ceramic, 16V, 10% +Tol, 10% -Tol, X7R, 15% TC, 1uF, Surface Mount, 0612, CHIP
CategoryPassive components    capacitor   
File Size580KB,1 Pages
ManufacturerTDK Corporation
Websitehttp://www.tdk.com
Environmental Compliance  
Download Datasheet Parametric View All

C1632X7R1C105KT Overview

Ceramic Capacitor, Multilayer, Ceramic, 16V, 10% +Tol, 10% -Tol, X7R, 15% TC, 1uF, Surface Mount, 0612, CHIP

C1632X7R1C105KT Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
package instruction, 0612
Reach Compliance Codecompliant
ECCN codeEAR99
capacitance1 µF
Capacitor typeCERAMIC CAPACITOR
dielectric materialsCERAMIC
JESD-609 codee3
Installation featuresSURFACE MOUNT
multi-layerYes
negative tolerance10%
Number of terminals2
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package shapeRECTANGULAR PACKAGE
method of packingTR
positive tolerance10%
Rated (DC) voltage (URdc)16 V
size code0612
surface mountYES
Temperature characteristic codeX7R
Temperature Coefficient15% ppm/°C
Terminal surfaceMatte Tin (Sn) - with Nickel (Ni) barrier
Terminal shapeWRAPAROUND
Base Number Matches1
Flip Type Low Inductance C Series
L
W
Case
C0510 (0204)
C0816 (0306)
Length (mm)
0.52 ± 0.05
0.80 ± 0.10
0.80 ± 0.15
1.25 ± 0.20
1.60 ± 0.20
Width (mm)
1.00 ± 0.05
1.60 ± 0.10
1.60 ± 0.20
2.00 ± 0.20
3.20 ± 0.20
MaxThickness (mm)
0.35
0.60
0.60
1.00
1.45
T
C0816 (0306)
1
C1220 (0508)
C1632 (0612)
C
Series Name
Dimensions L x W (mm)
1632
X7R 1H 224 K T XXXX
• Flipped geometry provides low inductance (less than 400 pH)
• Allows adequate high frequency current to IC
• Provides stabilization of power line voltage
• High frequency noise suppression
Temperature Characteristic
Rated Voltage (DC)
Nominal Capacitance (pF)
Capacitance Tolerance
Packaging Style
Internal Codes
• Decoupling CPU power line
• High speed digital IC/decoupling
• PC, cell phones, camcorders, etc.
Capacitance
(μF)
0.010
0.022
0.047
0.10
0.22
0.47
1.0
2.2
4.7
10
C0510 (0204)
4.0V (0G)
16V (1C)
X7R
X7R
X7R
X6S
X6S
X6S
X7R
C0816 (0306)
10V (1A)
6.3V (0J)
4.0V (0G)
50V (1H)
X7R
X7R
X7R
X7R
X5R
X5R
X7R
X5R
X5R
X5R
1
1
C1220 (0508)
25V (1E)
16V (1C)
10V (1A)
6.3V (0J)
50V (1H)
X7R
X7R
X7R
X7R
X7R
X7S
X7S
X7S
1
1
C1632 (0612)
25V (1E)
16V (1C)
10V (1A)
6.3V (0J)
4.0V (0G)
X7R
X5R
X5R
X7R
X7R
X7R
X7R
X7R
X7R
X5R
X5R
X7R
X7R
X5R
X5R
X7S
X7S
X6S
= new for 2010
Attenuation vs. Frequency Characteristics
For decoupling capacitors, the parasitic inductance generated by the capacitor needs to
be small so that the resonant frequency is higher. The parasitic inductance will add
noise voltage spikes to the power line voltage as shown in the following equation:
δi/δt
can be very large when operating under very high frequency, where L is the
parasitic inductance. In order to stabilize the power line without adding anymore noise
from the capacitor, parasitic inductance needs to be small. Because of the unique
design of the Flip Type capacitor, the parasitic inductance is lower than the traditional
multilayer ceramic capacitor (MLCC). Therefore, the Flip Type MLCC is very effective for
high speed decoupling applications.
Internal structure of the standard MLCC
Symbol
a
C0510
(0204)
0.2 mm
0.6 mm
1.0 mm
C0816
(0306)
0.3 mm
1.0 mm
1.6 mm
C1220
(0508)
0.5 mm
1.6 mm
2.0 mm
C1632
(0612)
0.75 mm
2.2 mm
3.2 mm
Internal structure of the Flip Type MLCC
b
c
Rev. Oct. 2010

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