DP8421ATVX-25 datasheet, PDF - EEWORLD Datasheet

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DP8421ATVX-25: DescriptionIC DRAM CONTROLLER, PQCC68, PLASTIC, LCC-68, Memory Controller; CategoryThe embedded processor and controller Microcontrollers and processors; File Size819KB，58 Pages; ManufacturerNational Semiconductor（TI ）; Websitehttp://www.ti.com

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DP8421ATVX-25 Overview

IC DRAM CONTROLLER, PQCC68, PLASTIC, LCC-68, Memory Controller

DP8421ATVX-25 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
package instruction	QCCJ, LDCC68,1.0SQ
Reach Compliance Code	unknown
Address bus width	20
boundary scan	NO
External data bus width
JESD-30 code	S-PQCC-J68
JESD-609 code	e0
length	24.2316 mm
low power mode	NO
Number of blocks	4
Number of terminals	68
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC68,1.0SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum slew rate	95 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	24.2316 mm
uPs/uCs/peripheral integrated circuit type	MEMORY CONTROLLER, DRAM
Base Number Matches	1

DP8421ATVX-25 Related Products

	DP8421ATVX-25	DP8421AVX-25	DP8421AVX-20	DP8421ATV-25
Description	IC DRAM CONTROLLER, PQCC68, PLASTIC, LCC-68, Memory Controller	IC 1M X 1, DRAM CONTROLLER, PQCC68, PLASTIC, LCC-68, Memory Controller	IC DRAM CONTROLLER, PQCC68, PLASTIC, LCC-68, Memory Controller	IC DRAM CONTROLLER, PQCC68, PLASTIC, LCC-68, Memory Controller
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible
package instruction	QCCJ, LDCC68,1.0SQ	QCCJ, LDCC68,1.0SQ	QCCJ, LDCC68,1.0SQ	QCCJ, LDCC68,1.0SQ
Reach Compliance Code	unknown	unknown	unknown	unknown
Address bus width	20	20	20	20
boundary scan	NO	NO	NO	NO
JESD-30 code	S-PQCC-J68	S-PQCC-J68	S-PQCC-J68	S-PQCC-J68
JESD-609 code	e0	e0	e0	e0
length	24.2316 mm	24.2316 mm	24.2316 mm	24.2316 mm
low power mode	NO	YES	NO	NO
Number of blocks	4	4	4	4
Number of terminals	68	68	68	68
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	QCCJ	QCCJ	QCCJ	QCCJ
Encapsulate equivalent code	LDCC68,1.0SQ	LDCC68,1.0SQ	LDCC68,1.0SQ	LDCC68,1.0SQ
Package shape	SQUARE	SQUARE	SQUARE	SQUARE
Package form	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	5 V	5 V	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	5.08 mm	5.08 mm	5.08 mm	5.08 mm
Maximum supply voltage	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	J BEND	J BEND	J BEND	J BEND
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	QUAD	QUAD	QUAD	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	24.2316 mm	24.2316 mm	24.2316 mm	24.2316 mm
uPs/uCs/peripheral integrated circuit type	MEMORY CONTROLLER, DRAM	MEMORY CONTROLLER, DRAM	MEMORY CONTROLLER, DRAM	MEMORY CONTROLLER, DRAM
Maximum slew rate	95 mA	95 mA	75 mA	-
Maker	-	National Semiconductor（TI ）	National Semiconductor（TI ）	National Semiconductor（TI ）

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