DPSD96MX8WKY5-DP-XX102 datasheet, PDF

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DPSD96MX8WKY5-DP-XX102: DescriptionSynchronous DRAM Module, 96MX8, CMOS, PDSO54, LEADLESS STACK, TSOP-54; Categorystorage storage; File Size350KB，2 Pages; ManufacturerB&B Electronics Manufacturing Company

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DPSD96MX8WKY5-DP-XX102 Overview

Synchronous DRAM Module, 96MX8, CMOS, PDSO54, LEADLESS STACK, TSOP-54

DPSD96MX8WKY5-DP-XX102 Parametric

Parameter Name	Attribute value
Parts packaging code	TSOP
package instruction	ATSOP,
Contacts	54
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	FOUR BANK PAGE BURST
Other features	AUTO/SELF REFRESH
JESD-30 code	R-PDSO-G54
length	22.48 mm
memory density	805306368 bit
Memory IC Type	SYNCHRONOUS DRAM MODULE
memory width	8
Number of functions	1
Number of ports	1
Number of terminals	54
word count	100663296 words
character code	96000000
Operating mode	SYNCHRONOUS
organize	96MX8
Package body material	PLASTIC/EPOXY
encapsulated code	ATSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, PIGGYBACK, THIN PROFILE
Certification status	Not Qualified
Maximum seat height	3.81 mm
self refresh	YES
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	DUAL
Base Number Matches	1

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768 Megabit Synchronous DRAM

DPSD96MX8WKY5

DESCRIPTION:

The LP-Stack™ series is a family of interchangeable memory modules. The 768 Megabit SDRAM is a member of this family which utilizes the new

and innovative space saving TSOP stacking technology. The modules are constructed with 32 Meg x 8 SDRAMs.

This 256 Megabit based LP-Stack™ module, the DPSD96MX8WKY5 has

been designed to fit in the same footprint as the 32 Meg x 8 SDRAM TSOP

monolithic and 256 Megabit SDRAM based family of LP-Stack™ modules.

This allows the memory board designer to upgrade the memory in their

products without redesigning the memory board, thus saving time and

money.

PIN-OUT DIAGRAM

VCC

DQ0

VCCQ

N.C.

DQ1

VSSQ

N.C.

DQ2

VCCQ

N.C.

DQ3

VSSQ

CS2

VCC

CS1

WE

CAS

RAS

CS0

BA0

BA1

A10

A0

A1

A2

A3

VCC

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

54

53

52

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

VSS

DQ7

VSSQ

N.C.

DQ6

VCCQ

N.C.

DQ5

VSSQ

N.C.

DQ4

VCCQ

N.C.

VSS

N.C.

DQM

CLK

CKE

A12

A11

A9

A8

A7

A6

A5

A4

VSS

FEATURES:

ADVANCED INFORMATION

•

Configuration Available:

•

96 Meg x 8 (3 Banks of 8M x 4 x 8 bits)

Clock Frequency:

66

[1]

, 83

[1]

, 100, 125

[2]

, 133

[2]

MHz (max.)

PC100 and PC133 Compatible

3.3V Supply

LVTTL Compatible I/O

Four Bank Operation

Programmable Burst Type, Burst Length,

and CAS Latency

8192 Cycles / 64 ms

Auto and Self Refresh

Package: TSOP Leadless Stack

[1] Available in Industrial Temperature Ranges Only

[2] Available in Commercial Temperature Range Only.

(TOP VIEW)

NOTES:

PIN NAMES

A0 - A12

BA0, BA1

DQ0 - DQ7

CAS

RAS

WE

DQM

CKE

CLK

CS0-CS2

V

CC

/V

SS

V

CCQ

/V

SSQ

N.C.

30A226-30

REV. A

FUNCTIONAL BLOCK DIAGRAM

(4x8Mx8bit)

Row Address:

Column Address:

Data In / Data Out

A0 - A12

A0 - A9, A11

CS2

(4x8Mx8bit)

Bank Select Address

Column Address Strobes

Row Address Enables

Data Write Enable

Data Input/Output Mask

Clock Enable

System Clock

Chip Selects

Power Supply/Ground

Data Output Power/Ground

No Connect

CS1

CS0

RAS

CAS

WE

CLK

DQM

CKE

A0-A12

BA0,BA1

(4x8Mx8bit)

256 Mbit SDRAM

DQ0-DQ7

This document contains information on a product presently under development at Dense-Pac Microsystems, Inc.

Dense-Pac reserves the right to change products or specifications herein without prior notice.

1

DPSD96MX8WKY5-DP-XX102 Related Products

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Parts packaging code	TSOP	TSOP	TSOP	TSOP	TSOP	TSOP	TSOP	TSOP
package instruction	ATSOP,	ATSOP,	ATSOP,	ATSOP,	ATSOP,	ATSOP,	ATSOP,	ATSOP,
Contacts	54	54	54	54	54	54	54	54
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
access mode	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST
Other features	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
JESD-30 code	R-PDSO-G54	R-PDSO-G54	R-PDSO-G54	R-PDSO-G54	R-PDSO-G54	R-PDSO-G54	R-PDSO-G54	R-PDSO-G54
length	22.48 mm	22.48 mm	22.48 mm	22.48 mm	22.48 mm	22.48 mm	22.48 mm	22.48 mm
memory density	805306368 bit	805306368 bit	805306368 bit	805306368 bit	805306368 bit	805306368 bit	805306368 bit	805306368 bit
Memory IC Type	SYNCHRONOUS DRAM MODULE	SYNCHRONOUS DRAM MODULE	SYNCHRONOUS DRAM MODULE	SYNCHRONOUS DRAM MODULE	SYNCHRONOUS DRAM MODULE	SYNCHRONOUS DRAM MODULE	SYNCHRONOUS DRAM MODULE	SYNCHRONOUS DRAM MODULE
memory width	8	8	8	8	8	8	8	8
Number of functions	1	1	1	1	1	1	1	1
Number of ports	1	1	1	1	1	1	1	1
Number of terminals	54	54	54	54	54	54	54	54
word count	100663296 words	100663296 words	100663296 words	100663296 words	100663296 words	100663296 words	100663296 words	100663296 words
character code	96000000	96000000	96000000	96000000	96000000	96000000	96000000	96000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
organize	96MX8	96MX8	96MX8	96MX8	96MX8	96MX8	96MX8	96MX8
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	ATSOP	ATSOP	ATSOP	ATSOP	ATSOP	ATSOP	ATSOP	ATSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, PIGGYBACK, THIN PROFILE	SMALL OUTLINE, PIGGYBACK, THIN PROFILE	SMALL OUTLINE, PIGGYBACK, THIN PROFILE	SMALL OUTLINE, PIGGYBACK, THIN PROFILE	SMALL OUTLINE, PIGGYBACK, THIN PROFILE	SMALL OUTLINE, PIGGYBACK, THIN PROFILE	SMALL OUTLINE, PIGGYBACK, THIN PROFILE	SMALL OUTLINE, PIGGYBACK, THIN PROFILE
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	3.81 mm	3.81 mm	3.81 mm	3.81 mm	3.81 mm	3.81 mm	3.81 mm	3.81 mm
self refresh	YES	YES	YES	YES	YES	YES	YES	YES
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL

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Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

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