OC-35A-30AT datasheet, PDF - EEWORLD Datasheet

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OC-35A-30AT: Description3.2X5X1.2mm / 3.3V / SMD / HCMOS/TTL Oscillator; File Size34KB，1 Pages; ManufacturerETC

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OC-35A-30AT Overview

3.2X5X1.2mm / 3.3V / SMD / HCMOS/TTL Oscillator

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OC-35 Series

3.2X5X1.2mm / 3.3V / SMD / HCMOS/TTL Oscillator

Lead-Free

RoHS Compliant

C A L I B E R

Electronics Inc.

PART NUMBERING GUIDE

Package

OC-35

= 3.3Vdc

OC-35A = 1.8Vdc

OC-35B = 2.5Vdc

Inclusive Stability

100= +/-100ppm, 50= +/-50ppm, 30= +/-30ppm, 25= +/-25ppm,

20= +/-20ppm

(25,20 = 0°C-70°C Only)

Environmental/Mechanical Specifications on page F5

OC-35A- 100 48 A T - 30.000MHz

Pin One Connection

T = Tri State Enable High

Output Symmetry

Blank = 40/60%, A = 45/55%

Operating Temperature Range

Blank = -10°C to 70°C, 27 = -20°C to 70°C, 48 = -40°C to 85°C

ELECTRICAL SPECIFICATIONS

Frequency Range

Operating Temperature Range

Storage Temperature Range

Supply Voltage

Input Current

1.544MHz to 36.000MHz

and 32.768kHz

36,001MHz to 70.000MHz

70.001MHz to 125.000MHz

Inclusive of Operating Temperature Range, Supply

Voltage and Load

w/HCMOS or TTL Load

wHCMOS or TTL Load

Revision: 2003-B

1.544MHz to 156.250MHz /

32.768kHz @ 3.3V)

-10°C to 70°C / -20°C to 70°C / -40°C to 85°C

-55°C to 125°C

A=1.8Vdc / B=2.5Vdc / BLANK=3.3Vdc ±10%

2mA Maximum

5mA Maximum

7mA Maximum

±100ppm, ±50ppm, ±30ppm, ±25ppm, ±20ppm

(±50ppm for 32.768kHz only)

90% of Vdd Min. / Ioh=-8mA

10% of Vdd Max. / Iol=8mA

Frequency Tolerance / Stability

Output Voltage Logic High (Voh)

Output Voltage Logic Low (Vol)

Rise / Fall Time

Duty Cycle

Load Drive Capability

10% to 90% of Waveform w/HCMOS Load; 0.4Vdc to 2.4V w/TTL Load / 6nSec Max.

@1.4Vdc w/TTL Load; @50% w/HCMOS Load

@1.4Vdc w/TTL Load or w/HCMOS Load

</= 70.000MHz

>70.000MHz

</=70.000MHz (Optional)

No Connection

50 ±10% (Standard)

50±5% (Optional)

10LSTTL Load or 15pF HCMOS Load

15pF HCMOS Load

10TTL Load or 50pF HCMOS Load

Enables Output

2.2Vdc Minimum to Enable Output

+0.8Vdc Maximum to Disable Output

±5ppm / year Maximum

10mSeconds Maximum

±250pSeconds Maximum

±50pSeconds Maximum

Pin 1 Tristate Input Voltage

Aging (@ 25°C)

Start Up Time

Absolute Clock Jitter

One Sigma Clock Jitter

MECHANICAL DIMENSIONS

All Dimensions in mm.

3.20

± 0.20

Marking Guide

Metal

1.0

±0.2

1.4 ±0.2

(X4 plcs.)

2.54

±0.15

Application Note:

A 0.01uF bypass capacitor

should be placed between

Vdd (pin 4) and GND (pin

2) to minimize power supply

line noise.

(X4 plcs.)

Line 1: A, B or Blank - Frequency

Line 2: CEI YM

A = Voltage designator

CEI = Caliber Electronics Inc.

YM = Date Code (Year / Month)

5.0

± 0.20

1.20

±0.15

Ceramic

1.2

Max

2.20

±0.15

Pin 3: Output

Pin 4: Supply Voltage

Pin 1: Tri-State

Pin 2: Case Ground

TEL

949-366-8700

FAX

949-366-8707

WEB

http://www.caliberelectronics.com

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