8400001FA datasheet, PDF - EEWORLD Datasheet

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8400001FA: DescriptionDual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-CFP -55 to 125; Categorylogic logic; File Size111KB，7 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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8400001FA Overview

Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-CFP -55 to 125

8400001FA Parametric

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Texas Instruments
Parts packaging code	DFP
package instruction	DFP, FL16,.3
Contacts	16
Reach Compliance Code	not_compliant
series	ALS
JESD-30 code	R-GDFP-F16
length	10.16 mm
Logic integrated circuit type	J-KBAR FLIP-FLOP
Maximum Frequency@Nom-Sup	30000000 Hz
MaximumI(ol)	0.004 A
Number of digits	2
Number of functions	2
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output polarity	COMPLEMENTARY
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DFP
Encapsulate equivalent code	FL16,.3
Package shape	RECTANGULAR
Package form	FLATPACK
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Maximum supply current (ICC)	4 mA
propagation delay (tpd)	21 ns
Certification status	Not Qualified
Filter level	MIL-STD-883
Maximum seat height	2.03 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	TTL
Temperature level	MILITARY
Terminal form	FLAT
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Trigger type	POSITIVE EDGE
width	6.73 mm
minfmax	30 MHz
Base Number Matches	1

8400001FA Related Products

	8400001FA	SNJ54AS109AFK
Description	Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-CFP -55 to 125	Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 20-LCCC -55 to 125
Brand Name	Texas Instruments	Texas Instruments
Is it lead-free?	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible
Maker	Texas Instruments	Texas Instruments
Parts packaging code	DFP	QLCC
package instruction	DFP, FL16,.3	QCCN, LCC20,.35SQ
Contacts	16	20
Reach Compliance Code	not_compliant	not_compliant
series	ALS	AS
JESD-30 code	R-GDFP-F16	S-CQCC-N20
length	10.16 mm	8.89 mm
Logic integrated circuit type	J-KBAR FLIP-FLOP	J-KBAR FLIP-FLOP
Number of digits	2	2
Number of functions	2	2
Number of terminals	16	20
Maximum operating temperature	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C
Output polarity	COMPLEMENTARY	COMPLEMENTARY
Package body material	CERAMIC, GLASS-SEALED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DFP	QCCN
Encapsulate equivalent code	FL16,.3	LCC20,.35SQ
Package shape	RECTANGULAR	SQUARE
Package form	FLATPACK	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED
Maximum supply current (ICC)	4 mA	17 mA
propagation delay (tpd)	21 ns	10.5 ns
Certification status	Not Qualified	Not Qualified
Filter level	MIL-STD-883	MIL-PRF-38535
Maximum seat height	2.03 mm	2.03 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V
surface mount	YES	YES
technology	TTL	TTL
Temperature level	MILITARY	MILITARY
Terminal form	FLAT	NO LEAD
Terminal pitch	1.27 mm	1.27 mm
Terminal location	DUAL	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
Trigger type	POSITIVE EDGE	POSITIVE EDGE
width	6.73 mm	8.89 mm
minfmax	30 MHz	90 MHz

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