EEWORLDEEWORLDEEWORLD

Part Number

Search

531FB294M000DG

Description
LVDS Output Clock Oscillator, 294MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

531FB294M000DG Overview

LVDS Output Clock Oscillator, 294MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531FB294M000DG Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
Reach Compliance Codeunknown
Other featuresTRAY
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability20%
JESD-609 codee4
Manufacturer's serial number531
Installation featuresSURFACE MOUNT
Nominal operating frequency294 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVDS
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage2.75 V
Minimum supply voltage2.25 V
Nominal supply voltage2.5 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
Base Number Matches1
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
Ask some questions about microwave ovens and utensils
First of all, let me ask: Is it harmful to heat food in a microwave? I have no choice. I am alone and lazy. I have to use it. Yesterday, I went to the county supermarket and bought two cheap glass bow...
wangfuchong Talking
Registration for the first half of 2019 software exam is now open
[i=s]This post was last edited by yilonglucky on 2019-3-12 11:11[/i] The National Computer Technology and Software Professional Technical Qualification (Level) Examination is now open for online regis...
yilonglucky Talking about work
MSP430 G2553 Low Power Mode LPMx
In addition to the active mode during normal operation, MSP430 also supports five low-power modes: LPM0, LPM1, LPM2, LPM3, and LPM4, which are set by the CPUOFF, OSCOFF, SCG0, and SCG1 bits in the sta...
灞波儿奔 Microcontroller MCU
Why can't my DE1 SOC connect to the PC via PING?
I have installed LINUX on the SD card. The board is also running Linux normally, but why can't I ping the board and the PC? . . . Please help me, a novice....
LIXIAO734752357 FPGA/CPLD
OP-07 read voltage
As shown in the photo: the higher the DC voltage connected to the ground by the negative pole of the battery, the greater the error of the AD value read by the microcontroller. Please tell me how to e...
JACKYJ.88 Analog electronics
How to set individual trace solder mask windows in DXP?
The circuit needs to drive 8 relays. When multiple relays are closed and turned on, the current increases greatly. To ensure the actual effect, while widening the current line, it is hoped that the so...
中信华 PCB Design

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1439  1381  1863  952  2382  29  28  38  20  48 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号