574MI datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > logic> logic> 574MI

574MI: DescriptionPLL Based Clock Driver, 574 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, SOIC-8; Categorylogic logic; File Size169KB，7 Pages; ManufacturerIDT (Integrated Device Technology)

Download Datasheet Parametric Compare View All

574MI Overview

PLL Based Clock Driver, 574 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, SOIC-8

574MI Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	SOIC
package instruction	SOIC-8
Contacts	8
Reach Compliance Code	not_compliant
series	574
Input adjustment	STANDARD
JESD-30 code	R-PDSO-G8
JESD-609 code	e0
length	4.9 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER
MaximumI(ol)	0.018 A
Humidity sensitivity level	1
Number of functions	1
Number of inverted outputs
Number of terminals	8
Actual output times	4
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP8,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
power supply	3.3 V
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.15 ns
Maximum seat height	1.75 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
width	3.9 mm
minfmax	160 MHz
Base Number Matches	1

Preview

Download Datasheet

View All

DATASHEET

ZERO DELAY, LOW SKEW BUFFER

Description

The ICS574 is a low jitter, low-skew, high performance

PLL-based zero delay buffer for high speed applications.

Based on IDT’s proprietary low jitter Phase Locked Loop

(PLL) techniques, the device provides four low skew

outputs at speeds up to 160 MHz at 3.3 V. When one of the

outputs is connected directly to FBIN, the rising edge of

each output is aligned with the rising edge of the input

clock. External delay elements connected in the feedback

loops will cause the outputs to occur before the inputs by

the amount of propagation delay of the external element.

ICS574

Features

•

Packaged in 8 pin narrow SOIC, Pb (lead) free available

Zero input-to-output delay

Four 1X outputs

Output to output skew is less than 150 ps

Output clocks up to 160 MHz at 3.3 V

External feedback path for output edge placement

Spread Smart™ technology works with spread spectrum

clock generators

TTL levels at 3.3 V

•

Full CMOS outputs with 18 mA output drive capability at

•

Advanced, low power, sub-micron CMOS process

•

Operating voltage from 3.0 to 5.5 V

•

Industrial temperature version available

NOTE: EOL for non-green parts to occur on 5/13/10

per PDN U-09-01

Block Diagram

CLK1

FBIN

CLKIN

CLK2

PLL

CLK3

CLK4

IDT™/ ICS™

ZERO DELAY, LOW SKEW BUFFER

ICS574

REV F 092509

574MI Related Products

	574MI	574MIT	574MT	574M
Description	PLL Based Clock Driver, 574 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, SOIC-8	PLL Based Clock Driver, 574 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, SOIC-8	PLL Based Clock Driver, 574 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, SOIC-8	PLL Based Clock Driver, 574 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, SOIC-8
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	SOIC	SOIC	SOIC	SOIC
package instruction	SOIC-8	SOIC-8	SOIC-8	SOIC-8
Contacts	8	8	8	8
Reach Compliance Code	not_compliant	not_compliant	not_compliant	not_compliant
series	574	574	574	574
Input adjustment	STANDARD	STANDARD	STANDARD	STANDARD
JESD-30 code	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8
JESD-609 code	e0	e0	e0	e0
length	4.9 mm	4.9 mm	4.9 mm	4.9 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER
MaximumI(ol)	0.018 A	0.018 A	0.018 A	0.018 A
Humidity sensitivity level	1	1	1	1
Number of functions	1	1	1	1
Number of terminals	8	8	8	8
Actual output times	4	4	4	4
Maximum operating temperature	85 °C	85 °C	70 °C	70 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	SOP	SOP	SOP
Encapsulate equivalent code	SOP8,.25	SOP8,.25	SOP8,.25	SOP8,.25
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE
power supply	3.3 V	3.3 V	3.3 V	3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Same Edge Skew-Max（tskwd）	0.15 ns	0.15 ns	0.15 ns	0.15 ns
Maximum seat height	1.75 mm	1.75 mm	1.75 mm	1.75 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	3 V	3 V	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL
width	3.9 mm	3.9 mm	3.9 mm	3.9 mm
minfmax	160 MHz	160 MHz	160 MHz	160 MHz
Base Number Matches	1	1	1	-

Recommended Resources

Inverter drive circuit

Operational amplifier stabilized power supply circuit 4

Micropower low dropout adjustable integrated voltage regulator application circuit 04

tPLH and tPLH LED input test circuit

Voltage stabilizing circuit diagram using TL499A

LT1073 Several circuits for reducing ripple in voltage conversion circuits

I've been busy lately!: I've been busy lately, and I've seldom visited the forums! :Sad: The development kit I applied for has been idle for a week! I only have one week left to hand in the board! I'm really sorry! I'm sorry...; 汉江之源 Microcontroller MCU

There is a problem with the LPC2468 programming program, where is the master?: I use JLINL to program through the JTAG interface. There are always problems when erasing the program, and the errors that appear are also different. Can the masters give me some guidance? Thank you v...; faddist NXP MCU

TSP distributed control increases test speed and reduces test costs: TSP technology enhances instrument control by allowing users to use standard PC control or create embedded test scripts that execute on the microprocessor within the instrument. By using TSP test scri...; Jack_ma Test/Measurement

Please help look at this program!: #include#pragma vector = PORT1_VECTOR __interrupt void Port_1(void) { volatile unsigned int i; // volatileWhen programming the source code, do not use optimization for this variablefor (i = 0; i30000;...; Hsiang Microcontroller MCU

Orcad Capture CIS automatically numbers after deleting a component, and DRC appears when importing the netlist into Allegro: For example, I drew 10 resistors, numbered R1~R10, and the connections were already drawn in Allegro. Then I deleted R5 in the schematic, renumbered it automatically, and then imported it into the net...; ayu_ag PCB Design

ActiveSync installation error: I encountered an error when installing ActiveSync. The error message was "Error writing to file: C:\Program Files\Microsoft ActiveSync\wcesmgr.exe, please verify that you have access to the directory....; han0602 Embedded System

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components