Product Brief
Supermapper™
155/51 Mbits/s SONET/SDH x
DS3/DS2/DS1/E1/DS0
F e at u r e s
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Overview
— The DS1/E1 test patterns can be transmitted
either unframed or as the payload of a framed
signal.
— Provisionable test patterns include QRSS,
PRBS15, PRBS20, PRBS23, alternating 1 and 0,
all ones, and a 16-bit repeating user pattern.
— Single bit or framing (DS1/E1) errors can be
injected into any test pattern.
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Signal interfaces:
— One STS-3/STM-1 port (MSP 1 + 1 switch
capability).
— One DS3 interface or STS-1 Interface.
— DS2 Interface available.
— Up to x28/21DS1/E1 interfaces.
— DS0 interfaces include 2, 4, or 8 MHz
serial concentration highway (CHI),
51.84 MHz Network Serial Multiplexed
Interfaces (NSMI) and a 19.44 MHz Parallel
System Bus (PSB)
— Telecom bus interface to mate to other
Supermapper devices.
The SONET/SDH Supermapper device family
integrates the SONET/SDH section, line, path,
and tributary termination functions with
M13 multiplex function and the primary rate
framing function. The devices interface to an
STS-1/STM-0 electrical signal or to an STS-3/
STM-1 to allow for modular growth in terminal
or add/drop applications.
The Supermapper family of devices provides
a versatile interface for all STS-3/STM-1 and
STS-1 termination applications for point-to-
point scenarios and ring applications. Used
in tributary shelf applications, these chips
enable up to 28 DS1/J1 or 21 E1 interfaces to
provide an array of possible mappings to/from
SONET/SDH.
A single Supermapper is capable of processing
the aggregate bandwidth of one STS-1 or DS3.
By connecting to two other Supermapper
devices via the telecom bus interface, it is
capable of terminating a full STS-3/STM-1
signal (i.e., 84/84/63 T1/JT1/E1).
Virtual tributary mapping:
— Maps DS1/J1/E1 into VT/TU structures,
DS1 into VT1.5/TU-11/TU-12, J1 into
VT1.5/TU-11/TU-12, and E1 into VT2/TU-12.
— Supports asynchronous, byte synchronous,
and bit synchronous mappings.
— Full monitoring/generation of low-order path
overhead
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SONET/SDH functionality:
— Multiplexes/demultiplexes any one of
the following:
• Three STS-1 signals to/from a SONET
STS-3 signal.
• Three STM-0 signals to/from an STM-1
signal.
— Provides STS-3/STM-1/STS-1 pointer
interpretation and detection and full
SONET/SDH alarm reporting.
• Three VC-3 signals to/from an SDH
STM-1 (3xAU-3) signal.
• Three VC-3 signals to/from an SDH STM-1
(AU-4) signal via a TUG-3 construction.
— Provides separate protection input for
support of 1:1 and 1 + 1.
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M13 MUX:
— A configurable multiplexer/demultiplexer for
28 DS1 signals, 21 E1 signals, or seven DS2
signals to/from a DS3 signal.
— Operates in either M23 or C-bit parity mode.
— Full DS3 level alarm monitoring and generation.
DS1/J1/E1 framers:
— 28/21 total DS1/J1/E1 channels. DS1/J1
framing modes include ESF, D4, SF (Ft only),
and J-ESF.
— E1 framing modes include, G.704 basic and
CRC-4 multiframe consistent with G.706.
— Support for DS1 and E1 signaling as well as
FDL and HDLC.
— Full alarm reporting and performance
monitoring per AT&T®, ANSI®, ITU-T™, and ETSI
standards.
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Synchronous payload envelope mapping:
— Maps/demaps TUG-2 data either to/
from an AU-3/STS-1 or a TUG-3.
— Handles channelized/unchannelized DS3
at 44.736 Mbits/s rate from an external I/O.
— DS3 loopback option and limited DS3
PMON.
— Path overhead byte B3 (BIP error)
generation/detection.
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Highly flexible interconnect (Cross connect) for
up to 28 DS1 or 21 E1 signal to/from the framer,
external I/O, M13, and VT mapper.
DS1/E1 digital jitter attenuators (DJA) with
programmable PLL bandwidth, damping factor,
and sampling rates; configurable to meet jitter
and MTIE requirements.
20-bit address/16-bit data bus microprocessor
interface supporting synchronous and asynchro-
nous modes of operation from 16 MHz to 60 MHz.
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Test pattern generator/monitor:
— A configurable test-pattern generator,
DS1, E1, DS2, and DS3 formats.
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Supermapper Block Diagram
Applications
Point-to-Point, SONET/SDH ring, TDM and PDH aggregation/deaggregation, and switching applications.
Ordering Information
Below is the ordering information for one product in the family. Please refer to the Supermapper
Family Selection Guide
O r d e r i n g i n F O r m at i O n :
Device
Supermapper V3.2
Part Number
TMXF28155BAL-C2-DB
L-TMXF28155BAL-C2-DB
Comcode
700067626
711011774
Package
456-pin PBGA
456-pin PBGA
Note: Part numbers beginning with L- are RoHS compliant.
For more information and sales office locations, please visit the LSI web sites at:
lsi.com lsi.com/contacts
LSI Corporation and, LSI logo design The Communications Company, are trademarks or registered trademarks of LSI Corporation.
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products and services herein at any time without notice. LSI does not assume any responsibility or liability arising out of the application or use
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of third parties.
Copyright ©2006 by LSI Corporation. All rights reserved.
October 4, 2006
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