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74LVCH162374ADGG:5

Description
74LVCH162374A - 16-bit edge-triggered D-type flip-flop TSSOP 48-Pin
Categorylogic    logic   
File Size718KB,17 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
Download Datasheet Parametric Compare View All

74LVCH162374ADGG:5 Overview

74LVCH162374A - 16-bit edge-triggered D-type flip-flop TSSOP 48-Pin

74LVCH162374ADGG:5 Parametric

Parameter NameAttribute value
Brand NameNexperia
Parts packaging codeTSSOP
package instructionTSSOP,
Contacts48
Manufacturer packaging codeSOT362-1
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-G48
JESD-609 codee4
length12.5 mm
Logic integrated circuit typeBUS DRIVER
Humidity sensitivity level1
Number of digits8
Number of functions2
Number of ports2
Number of terminals48
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE WITH SERIES RESISTOR
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
propagation delay (tpd)7.2 ns
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)1.2 V
Nominal supply voltage (Vsup)2.7 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceNICKEL PALLADIUM GOLD
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width6.1 mm
74LVCH162374A
16-bit edge-triggered D-type flip-flop with 30
series
termination resistors; 5 V input/output tolerant; 3-state
Rev. 4 — 22 January 2013
Product data sheet
1. General description
The 74LVCH162374A is a 16-bit edge triggered flip-flop featuring separate D-type inputs
for each flip-flop and 3-state outputs for bus-oriented applications. The device consists of
two sections of 8 edge-triggered flip-flops. A clock (CP) input and an output enable (OE)
are provided for each octal. Inputs can be driven from either 3.3 V or 5 V devices. When
disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these
devices in mixed 3.3 V and 5 V applications. The flip-flops store the state of their
individual D-inputs that meet the set-up and hold time requirements on the LOW to HIGH
CP transition. When OE is LOW, the contents of the flip-flops are available at the outputs.
When OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE
input does not affect the state of the flip-flops.
Bus hold on data inputs eliminates the need for external pull-up resistors to hold unused
inputs.
To reduce line noise, 30
series termination resistors are included in both high and low
output stages.
2. Features and benefits
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Multibyte flow-through standard pinout architecture
Multiple low inductance supply pins for minimum noise and ground bounce
Direct interface with TTL levels
All data inputs have bus hold
High-impedance outputs when V
CC
= 0 V
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from
40 C
to +85
C
and
40 C
to +125
C

74LVCH162374ADGG:5 Related Products

74LVCH162374ADGG:5 74LVCH162374ADL:11 74LVCH162374ADGG:1 74LVCH162374ADGG,1
Description 74LVCH162374A - 16-bit edge-triggered D-type flip-flop TSSOP 48-Pin IC FF D-TYPE DUAL 8BIT 48SSOP IC FF D-TYPE DUAL 8BIT 48TSSOP IC FF D-TYPE DUAL 8BIT 48TSSOP
Brand Name Nexperia Nexperia Nexperia Nexperia
Parts packaging code TSSOP SSOP TSSOP TSSOP
package instruction TSSOP, SSOP-48 TSSOP-48 TSSOP-48
Contacts 48 48 48 48
Manufacturer packaging code SOT362-1 SOT370-1 SOT362-1 SOT362-1
series LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z
JESD-30 code R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48
length 12.5 mm 15.875 mm 12.5 mm 12.5 mm
Logic integrated circuit type BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER
Number of digits 8 8 8 8
Number of functions 2 2 2 2
Number of ports 2 2 2 2
Number of terminals 48 48 48 48
Maximum operating temperature 85 °C 125 °C 125 °C 125 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C
Output characteristics 3-STATE WITH SERIES RESISTOR 3-STATE WITH SERIES RESISTOR 3-STATE WITH SERIES RESISTOR 3-STATE WITH SERIES RESISTOR
Output polarity TRUE TRUE TRUE TRUE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP SSOP TSSOP TSSOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd) 7.2 ns 20.8 ns 20.8 ns 20.8 ns
Maximum seat height 1.2 mm 2.8 mm 1.2 mm 1.2 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 1.2 V 1.2 V 1.2 V 1.2 V
Nominal supply voltage (Vsup) 2.7 V 1.8 V 1.8 V 1.8 V
surface mount YES YES YES YES
technology CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
Terminal form GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.5 mm 0.635 mm 0.5 mm 0.5 mm
Terminal location DUAL DUAL DUAL DUAL
width 6.1 mm 7.5 mm 6.1 mm 6.1 mm
Peak Reflow Temperature (Celsius) 260 NOT SPECIFIED NOT SPECIFIED -
Maximum time at peak reflow temperature 30 NOT SPECIFIED NOT SPECIFIED -
Is it Rohs certified? - conform to conform to conform to
Maker - Nexperia Nexperia Nexperia
Reach Compliance Code - compliant compliant compliant
Samacsys Description - 74LVCH162374A - 16-bit edge-triggered D-type flip-flop@en-us 74LVCH162374A - 16-bit edge-triggered D-type flip-flop@en-us 74LVCH162374A - 16-bit edge-triggered D-type flip-flop@en-us
Other features - IT ALSO OPERATES AT 1.65 TO 3.6V IT ALSO OPERATES AT 1.65 TO 3.6V IT ALSO OPERATES AT 1.65 TO 3.6
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