MGA-82563
0.1– 6 GHz 3 V, 17 dBm Amplifier
Data Sheet
Description
Avago’s MGA-82563 is an economical, easy-to-use GaAs
MMIC amplifier that offers excellent power and low
noise figure for applications from 0.1 to 6 GHz. Pack-
aged in an ultra-miniature SOT-363 package, it requires
half the board space of a SOT-143 package.
The input and output of the amplifier are matched to
50Ω (below 2:1 VSWR) across the entire bandwidth,
eliminating the expense of external matching. The
amplifier allows a wide dynamic range by offering a
2.2 dB NF coupled with a +31 dBm Output IP
3
.
The circuit uses state-of-the-art PHEMT technology
with proven reliability. On-chip bias circuitry allows
operation from a single +3 V power supply, while resis-
tive feedback ensures stability (K>1) over all frequen-
cies and temperatures.
Features
• Lead-free Option Available
•
+17.3 dBm P
1 dB
at 2.0 GHz
+20 dBm P
sat
at 2.0 GHz
•
Single +3V Supply
•
2.2 dB Noise Figure at 2.0 GHz
•
13.2 dB Gain at 2.0 GHz
•
Ultra-miniature Package
•
Unconditionally Stable
Applications
•
Buffer or Driver Amp for PCS,
PHS, ISM, SATCOM and WLL Applications
•
High Dynamic Range LNA
Surface Mount Package
SOT-363 (SC-70)
Simplified Schematic
OUTPUT
and V
d
6
INPUT
3
MGA-86563 Pkg
BIAS
BIAS
Pin Connections and Package Marking
GND 1
GND 2
INPUT 3
6 OUTPUT
and V
d
5 GND
4 GND
GND
1, 2, 4, 5
Note:
Package marking provides orientation and identification.
"82" = Device Code
"x" = Date code character identifies month of manufacture
82x
Attention:
Observe precautions for handling electrostatic
sensitive devices.
ESD Machine Model (Class A)
ESD Human Body Model (Class 0)
Refer to Avago Application Note A004R:
Electrostatic Discharge
Damage and Control.
2
MGA-82563 Absolute Maximum Ratings
Symbol
V
d
V
gd
V
in
P
in
T
ch
T
STG
Parameter
Device Voltage, RF Output
to Ground
Device Voltage, Gate
to Drain
Range of RF Input Voltage
to Ground
CW RF Input Power
Channel Temperature
Storage Temperature
Units
V
V
V
dBm
°C
°C
Absolute
Maximum
[1]
5.0
-6.0
+0.5 to -1.0
+13
165
-65 to 150
Notes:
1. Permanent damage may occur if
any of these limits are exceeded.
2. T
C
= 25°C (T
C
is defined to be the
temperature at the top of the
package.)
Thermal Resistance
[2]
:
θ
ch-c
= 180°C/W
MGA-82563 Electrical Specifications,
T
C
= 25°C, Z
O
= 50
Ω,
V
d
= 3 V
Symbol
G
test
NF
test
NF
50
Parameters and Test Conditions
Gain in test circuit
[1]
Noise Figure in test circuit
[1]
Noise Figure in 50
Ω
system
f = 2.0 GHz
f = 2.0 GHz
f = 0.5 GHz
f = 1.0 GHz
f = 2.0 GHz
f = 3.0 GHz
f = 4.0 GHz
f = 6.0 GHz
f = 0.5 GHz
f = 1.0 GHz
f = 2.0 GHz
f = 3.0 GHz
f = 4.0 GHz
f = 6.0 GHz
f = 0.5 GHz
f = 1.0 GHz
f = 2.0 GHz
f = 3.0 GHz
f = 4.0 GHz
f = 6.0 GHz
f = 2.0 GHz
f = 0.2–5.0 GHz
f = 0.2–5.0 GHz
mA
63
dB
Units
Min.
12.0
Typ.
13.2
2.2
2.3
2.2
2.2
2.2
2.4
2.7
14.7
14.5
13.5
12.1
10.7
8.8
17.4
17.5
17.3
17.1
17.0
16.8
+31
1.8:1
1.2:1
84
101
Max.
15
2.9
Std Dev
[2]
0.35
0.20
0.20
|S
21
|
2
Gain in 50
Ω
system
dB
0.35
P
1 dB
Output Power at 1 dB Gain Compression
dBm
0.54
IP
3
VSWR
in
VSWR
out
I
d
Output Third Order Intercept Point
Input VSWR
Output VSWR
Device Current
dBm
1.0
Notes:
1. Guaranteed specifications are 100% tested in the circuit in Figure 10 in the Applications Information section.
2. Standard deviation number is based on measurement of at least 500 parts from three non-consecutive wafer lots during
the initial characterization of this product, and is intended to be used as an estimate for distribution of the typical
specification.
3
MGA-82563 Typical Performance, T
C
= 25° C, V
d
= 3 V
16
14
NOISE FIGURE (dB)
5
19
12
GAIN (dB)
4
P
1 dB
(dBm)
18
10
8
6
4
2
0
0
1
2
3
4
5
6
FREQUENCY (GHz)
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
3
17
2
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
0
1
2
3
4
5
6
16
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
0
1
2
3
4
5
6
1
15
0
FREQUENCY (GHz)
14
FREQUENCY (GHz)
Figure 1. 50
Ω
Power Gain vs.
Frequency and Temperature.
Figure 2. Noise Figure (into 50
Ω)
vs. Frequency and Temperature.
Figure 3. Output Power @ 1 dB Gain
Compression vs. Frequency and
Temperature.
16
14
NOISE FIGURE (dB)
5
19
12
GAIN (dB)
4
P
1 dB
(dBm)
18
10
8
6
4
2
0
0
1
2
3
4
5
6
FREQUENCY (GHz)
V
d
= 3.3V
V
d
= 3.0V
V
d
= 2.7V
3
17
2
V
d
= 3.3V
V
d
= 3.0V
V
d
= 2.7V
0
1
2
3
4
5
6
16
V
d
= 3.3V
V
d
= 3.0V
V
d
= 2.7V
0
1
2
3
4
5
6
1
15
0
FREQUENCY (GHz)
14
FREQUENCY (GHz)
Figure 4. 50
Ω
Power Gain vs.
Frequency and Voltage.
Figure 5. Noise Figure (into 50
Ω)
vs.
Frequency and Voltage.
Figure 6. Output Power @ 1 dB Gain
Compression vs. Frequency and
Voltage.
4
3.5
3
2.5
2
1.5
1
Input
110
100
DEVICE CURRENT (mA)
16
14
GAIN and NF (dB)
90
80
70
60
50
40
30
20
10
T
A
= +85°C
T
A
= +25°C
T
A
= -40°C
12
10
8
6
4
Gain
VSWR (n:1)
Output
NF
2
0
0
1
2
3
4
5
6
0
1
2
3
4
0
1
2
3
4
5
6
FREQUENCY (GHz)
DEVICE VOLTAGE (V)
FREQUENCY (GHz)
Figure 7. Input and Output VSWR
into 50
Ω
vs. Frequency.
Figure 8. Device Current vs. Voltage
and Temperature.
Figure 9. Minimum Noise Figure and
Associated Gain vs. Frequency.
5
MGA-82563 Applications Information
Introduction
This medium power GaAs MMIC amplifier was devel-
oped for commercial wireless applications from
100 MHz to 6 GHz. The MGA-82563 runs on only 3 volts
and typically requires only 84 mA to deliver over 17 dBm
of output power at 1 dB gain compression.
The 17.3 dBm output power (P
1 dB
) makes the MGA-
82563 extremely useful for pre-driver and driver stages
in transmit cascades or for final output stages in lower
power systems. For transmitter gain stage applications
that require even higher output power, the MGA-82563
can provide 100 mW (20 dBm) of saturated output
power with a power added efficiency approaching 50%.
The low cost of the MGA-82563 makes it feasible to
power combine two (or more) devices for even higher
output power amplifiers.
The MGA-82563 offers an excellent combination of
high linearity (+31 dBm output IP
3
) and very low noise
figure (2.2 dB) for applications requiring a very high
dynamic range.
The MGA-82563 uses resistive feedback to simulta-
neously achieve flat gain over a wide bandwidth and to
match the input and output impedances to 50Ω. The
MGA-82563 is also unconditionally stable (K>1) over
its entire frequency range, making it both very easy to
use and yielding consistent performance in the manu-
facture of high volume wireless products.
An innovative internal bias circuit regulates the device’s
internal current to enable the MGA-82563 to operate
over a wide temperature range with a single, positive
power supply of 3 volts. The MGA-82563 will operate
with reduced power and gain with a bias supply as low
as 1.5 volts.
Phase Reference Planes
The positions of the reference planes used to specify
the S-Parameters and Noise Parameters for this device
are shown in Figure 11. As seen in the illustration, the
reference planes are located at the point where the
package leads contact the test circuit.
REFERENCE
PLANES
TEST CIRCUIT
Figure 11. Phase Reference Planes.
Specifications and Statistical Parameters
Several categories of parameters appear within this
data sheet. Parameters may be described with values
that are either “minimum or maximum,” “typical,” or
“standard deviations.”
The values for parameters are based on comprehen-
sive product characterization data, in which automated
measurements are made on of a minimum of 500 parts
taken from 3 non-consecutive process lots of semicon-
ductor wafers. The data derived from product charac-
terization tends to be normally distributed, e.g., fits the
standard “bell curve.”
Parameters considered to be the most important to
system performance are bounded by
minimum
or
maximum
values. For the MGA-82563, these param-
eters are: Gain (G
test
), Noise Figure (NF
test
), and Device
Current (I
d
). Each of these guaranteed parameters is
100% tested.
Values for most of the parameters in the table of
Electrical Specifications that are described by
typical
data are the mathematical mean (µ), of the normal
distribution taken from the characterization data. For
parameters where measurements or mathematical
averaging may not be practical, such as the Noise and
S-parameter tables or performance curves, the data
represents a nominal part taken from the “center” of
the characterization distribution. Typical values are
intended to be used as a basis for electrical design.
Test Circuit
The circuit shown in Figure 10 is used for 100% RF testing
of Gain and Noise Figure. The test circuit is merely a 50Ω
input/output PC board with a RFC at the output to apply
DC bias to the device under test. Tests in this circuit are
used to guarantee the NF
test
and G
test
parameters shown
in the table of Electrical Specifications.
100 pF
RF
INPUT
RF
OUTPUT
22 nH
RFC
V
d
100 pF
Figure 10. Test Circuit.
82
FPGA/CPLD
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