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MT55L512L18PB-10IT

Description
ZBT SRAM, 512KX18, 5ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, MS-028BHA, BGA-119
Categorystorage    storage   
File Size486KB,30 Pages
ManufacturerCypress Semiconductor
Download Datasheet Parametric View All

MT55L512L18PB-10IT Overview

ZBT SRAM, 512KX18, 5ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, MS-028BHA, BGA-119

MT55L512L18PB-10IT Parametric

Parameter NameAttribute value
MakerCypress Semiconductor
Parts packaging codeBGA
package instructionBGA,
Contacts119
Reach Compliance Codeunknown
ECCN code3A991.B.2.A
Maximum access time5 ns
JESD-30 codeR-PBGA-B119
length22 mm
memory density9437184 bit
Memory IC TypeZBT SRAM
memory width18
Number of functions1
Number of terminals119
word count524288 words
character code512000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize512KX18
Package body materialPLASTIC/EPOXY
encapsulated codeBGA
Package shapeRECTANGULAR
Package formGRID ARRAY
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum seat height2.4 mm
Maximum supply voltage (Vsup)3.465 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formBALL
Terminal pitch1.27 mm
Terminal locationBOTTOM
width14 mm
8Mb: 512K x 18, 256K x 32/36
PIPELINED ZBT SRAM
8Mb
ZBT
®
SRAM
FEATURES
High frequency and 100 percent bus utilization
Fast cycle times: 6ns, 7.5ns and 10ns
Single +3.3V ±5% power supply (V
DD
)
Separate +3.3V or +2.5V isolated output buffer
supply (V
DD
Q)
Advanced control logic for minimum control
signal interface
Individual BYTE WRITE controls may be tied LOW
Single R/W# (read/write) control pin
CKE# pin to enable clock and suspend operations
Three chip enables for simple depth expansion
Clock-controlled and registered addresses, data
I/Os and control signals
Internally self-timed, fully coherent WRITE
Internally self-timed, registered outputs to
eliminate the need to control OE#
SNOOZE MODE for reduced-power standby
Common data inputs and data outputs
Linear or Interleaved Burst Modes
Burst feature (optional)
Pin/function compatibility with 2Mb, 4Mb, and
18Mb ZBT SRAM
Automatic power-down
100-pin TQFP package
165-pin FBGA package
119-pin BGA package
MT55L512L18P, MT55L512V18P,
MT55L256L32P, MT55L256V32P,
MT55L256L36P, MT55L256V36P
3.3V V
DD
, 3.3V or 2.5V I/O
100-Pin TQFP
1
165-Pin FBGA
(Preliminary Package Data)
OPTIONS
• Timing (Access/Cycle/MHz)
3.5ns/6ns/166 MHz
4.2ns/7.5ns/133 MHz
5ns/10ns/100 MHz
• Configurations
3.3V I/O
512K x 18
256K x 32
256K x 36
2.5V I/O
512K x 18
256K x 32
256K x 36
• Package
100-pin TQFP
165-pin, 13mm x 15mm FBGA
119-pin, 14mm x 22mm BGA
• Operating Temperature Range
Commercial (0ºC to +70ºC)
Industrial (-40°C to +85°C)**
MARKING*
-6
-7.5
-10
119-Pin BGA
2
MT55L512L18P
MT55L256L32P
MT55L256L36P
MT55L512V18P
MT55L256V32P
MT55L256V36P
T
F
B
None
IT
NOTE:
1. JEDEC-standard MS-026 BHA (LQFP).
2. JEDEC-standard MS-028 BHA (PBGA).
Part Number Example:
MT55L256L32PT-7.5
* A Part Marking Guide for the FBGA devices can be found on Micron’s
web site—http://www.micron.com/support/index.html.
** Industrial temperature range offered in specific speed grades and
confgurations. Contact factory for more information.
8Mb: 512K x 18, 256K x 32/36 Pipelined ZBT SRAM
MT55L512L18P_2.p65 – Rev. 6/01
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc.
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