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K4S283233E-DF1H0

Description
Synchronous DRAM, 4MX32, 7ns, CMOS, PBGA90, 11 X 13 MM, LEAD FREE, FBGA-90
Categorystorage    storage   
File Size78KB,10 Pages
ManufacturerSAMSUNG
Websitehttp://www.samsung.com/Products/Semiconductor/
Download Datasheet Parametric View All

K4S283233E-DF1H0 Overview

Synchronous DRAM, 4MX32, 7ns, CMOS, PBGA90, 11 X 13 MM, LEAD FREE, FBGA-90

K4S283233E-DF1H0 Parametric

Parameter NameAttribute value
MakerSAMSUNG
Parts packaging codeBGA
package instructionLFBGA,
Contacts90
Reach Compliance Codeunknown
ECCN codeEAR99
access modeFOUR BANK PAGE BURST
Maximum access time7 ns
Other featuresAUTO/SELF REFRESH
JESD-30 codeR-PBGA-B90
length13 mm
memory density134217728 bit
Memory IC TypeSYNCHRONOUS DRAM
memory width32
Number of functions1
Number of ports1
Number of terminals90
word count4194304 words
character code4000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature-25 °C
organize4MX32
Package body materialPLASTIC/EPOXY
encapsulated codeLFBGA
Package shapeRECTANGULAR
Package formGRID ARRAY, LOW PROFILE, FINE PITCH
Certification statusNot Qualified
Maximum seat height1.45 mm
self refreshYES
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelOTHER
Terminal formBALL
Terminal pitch0.8 mm
Terminal locationBOTTOM
width11 mm
K4S283233E-S(D)E/N/G/C/L/F
1M x 32Bit x 4 Banks SDRAM in 90FBGA
FEATURES
3.0V & 3.3V power supply
LVCMOS compatible with multiplexed address
Four banks operation
MRS cycle with address key programs
-. CAS latency (1, 2 & 3)
-. Burst length (1, 2, 4, 8 & Full page)
-. Burst type (Sequential & Interleave)
EMRS cycle with address key programs.
-. PASR(Partial Array Self Refresh)
-. Internal TCSR(Temperature Compensated Self Refresh)
All inputs are sampled at the positive going edge of the system
clock
Burst read single-bit write operation
DQM for masking
Auto & self refresh
64ms refresh period (4K cycle).
Extended Temperature Operation (-25
°C
~ 85°C).
Commercial Temperature Operation (-25
°C
~ 70
°C).
90Balls Monolithic FBGA(11mm x 13mm)
Pb for -SXXX, Pb Free for -DXXX.
Mobile-SDRAM
GENERAL DESCRIPTION
The K4S283233E is 134,217,728 bits synchronous high data
rate Dynamic RAM organized as 4 x 1,048,576 words by 32
bits, fabricated with SAMSUNG′s high performance CMOS
technology. Synchronous design allows precise cycle control
with the use of system clock and I/O transactions are possible
on every clock cycle. Range of operating frequencies, program-
mable burst lengths and programmable latencies allow the
same device to be useful for a variety of high bandwidth and
high performance memory system applications.
ORDERING INFORMATION
Part No.
Max Freq.
Interface Package
K4S283233E-S(D)E/N/G/C/L/F60 166MHz(CL=3)
133MHz(CL=3)
90FBGA
105MHz(CL=2) LVCMOS
Pb
K4S283233E-S(D)E/N/G/C/L/F1H 105MHz(CL=2)
(Pb Free)
K4S283233E-S(D)E/N/G/C/L/F75
K4S283233E-S(D)E/N/G/C/L/F1L 105MHz(CL=3)
*1
- S(D)E/N/G : Normal/Low Power, Extended Temperature.
- S(D)C/L/F : Normal/Low Power, Commercial Temperature.
Note :
1. In case of 40MHz Frequency, CL1 can be supported.
FUNCTIONAL BLOCK DIAGRAM
I/O Control
LWE
Data Input Register
LDQM
Bank Select
1M x 32
1M x 32
1M x 32
1M x 32
Refresh Counter
Output Buffer
Row Decoder
Sense AMP
Row Buffer
DQi
Address Register
CLK
ADD
Column Decoder
Col. Buffer
LRAS
LCBR
Latency & Burst Length
LCKE
LRAS
LCBR
LWE
LCAS
Programming Register
LWCBR
LDQM
Timing Register
CLK
CKE
CS
RAS
CAS
WE
DQM
* Samsung Electronics reserves the right to change products or specification without notice.
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