One Channel Speech Controller
SNC15040
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1.
2.
3.
4.
5.
===================== CONTENTS =====================
INTRODUCTION............................................................................................................3
FEATURES ......................................................................................................................3
PIN ASSIGNMENT.........................................................................................................3
BLOCK DIAGRAM ........................................................................................................4
FUNCTION DESCRIPTIONS .......................................................................................4
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
O
SCILLATOR
...............................................................................................................4
ROM ..........................................................................................................................4
RAM ..........................................................................................................................5
P
OWER
D
OWN
M
ODE
..................................................................................................5
S
AMPLING
R
ATE
C
OUNTER
.........................................................................................5
I/O P
ORTS
...................................................................................................................5
PWM O
UTPUT
............................................................................................................6
W
ATCH
D
OG
T
IMER
....................................................................................................6
IR F
UNCTION
..............................................................................................................6
6.
7.
8.
ABSOLUTE MAXIMUM RATING ..............................................................................6
ELECTRICAL CHARACTERISTICS .........................................................................7
APPLICATION CIRCUIT .............................................................................................8
8.1
8.2
G
ENERAL APPLICATION
...............................................................................................8
M
OTOR APPLICATION
..................................................................................................9
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Ver: 1.5
1
October 30, 2008
One Channel Speech Controller
SNC15040
AMENDENT HISTORY
Version
Ver 1.0
Ver 1.1
Ver 1.2
Ver 1.3
Ver 1.4
Ver 1.5
Date
Oct 30, 2007
May 28, 2008
June 10, 2008
June 23, 2008
August 25 2008
October 30,2008
First issue
Update Application Circuit
Refine Application Circuit
Refine Application Circuit
Refine Application Circuit
Refine Application Circuit
Description
Ver: 1.5
2
October 30, 2008
One Channel Speech Controller
SNC15040
1. INTRODUCTION
SNC15040 is a one-channel voice synthesizer IC with PWM direct drive circuit. It built
in a 4-bit tiny controller with two 4-bit I/O ports. By programming through the tiny
controller in SNC15040, user’s varied applications including voice section
combination, key trigger arrangement, output control, and other logic functions can be
easily implemented.
2. FEATURES
Single power supply 2.4V – 5.5V
40 seconds voice capacity are provided (@6KHZ sample rate)
Built in a 4-bit tiny controller
I/O Port
−
Two 4-bit I/O ports P2 and P5 are provided.
−
The driving/sink current of P2 & P5 is up to 8mA/16mA
−
The IO pins P2.3 can be modulated with 38.5Khz carry signal to implement IR
function.
64*4 bits RAM are provided
Maximum 64k program ROM is provided
84K*12 shared ROM for voice data and program
Readable ROM code data
Built in one channel speech synthesizer
Adaptive playing speed from 2.5k-20kHz is provided
Built in an PWM circuit output, can directly connected to Speaker for sound
output.
System clock: 2MHz
Event Mark function supported
Low Power Detect.
Watch Dog Timer Supported
3. PIN ASSIGNMENT
Symbol
P20~P23
P50~P53
Rosc
BUO1
BUO2
RST
VDDIO
GNDIO
CVDD
CGND
Test
Ver: 1.5
I/O
I/O
I/O
I
O
O
I
I
I
I
I
I
Function Description
I/O port 2: IO
I/O port 5: IO
Oscillation component connection pin
PWM output 1
PWM output 2
RST=1 Reset Chip (Active H)
Positive power supply for I/O
Negative power supply for I/O
Positive power supply for internal core
Negative power supply for internal core
Test pin
3
October 30, 2008
One Channel Speech Controller
SNC15040
4.
Block Diagram
ROM
Program/Speech
84K×12 bits
Address Pointers/ STACK
SRAM (64 nibbles)
Timer
ALU
IO port 2
Timing
Generator
OSC
Sampling Rate Counter
Watch Dog
Timer
PWM
Circuit
Voice
Synthesizer
IO port 5
5. FUNCTION DESCRIPTIONS
5.1 Oscillator
SNC15040 accepts RC type oscillator for system clock. The typical circuit diagram for
oscillator is listed as follows.
VCC
OSC
RC Oscillator
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5.2 ROM
SNC15040 contains a substantial 84K words (12-bit) internal ROM, which is shared by
program and resource data. Program, voice and data are shared within this same 84K
words ROM.
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4
October 30, 2008
One Channel Speech Controller
SNC15040
5.3 RAM
SNC15040 contains 64 nibble RAM (64 x 4-bits). The 64 nibble RAM is only one
page (page 0, 64 nibble RAM on each page). In our programming structure, users
can use the instructions, PAGE n (n=0) to switch and indicate the RAM page.
Besides, users can use direct mode, M0 ~ M63 in the data transfer type instructions,
to access all 64 nibbles of each page.
5.4 Power Down Mode
“End” instruction makes the IC entering into Stop Mode will stop the system clock for
power savings (<3uA @VDD=3V and <6uA @VDD=4.5V.) Any valid data transition
(L H or H L) occurring on any IO pin can be used to start the system clock and
return to normal operating mode.
5.5 Sampling Rate Counter
The unique sampling rate counter is designed in voice channel to be able to play
diverse voices at different sample playing rates. The playing rate can be adaptively set
up among from the wide ranges of 2.5KHz to 20KHz. This architecture yields a
high-quality voice synthesis that sounds very close to its original source when played
through the same amplifier and speaker circuitry.
5.6 I/O Ports
There are two 4-bit I/O ports P2 and P5. Any I/O can be individually programmed as
either input pull low or output. Any valid data transition (H L or L H) of P2 and P5
can reactivate the chip when it is in power-down stage.
Port Data
PAD
Port Status
Weak
To Internal Data Bus
Read Control
I/O Port Configuration
Note:
(1)
Weak N-MOS can serve as pull-low resistor.
(2)
The driving/sink current of P2 & P5 is up to 8mA/16mA
5
Ver: 1.5
October 30, 2008