LS5905 LS5906 LS5907
LS5908 LS5909
LOW LEAKAGE LOW DRIFT
MONOLITHIC DUAL N-CHANNEL JFET
FEATURES
LOW DRIFT
ULTRA LOW LEAKAGE
LOW PINCHOFF
ABSOLUTE MAXIMUM RATINGS
@ 25°C (unless otherwise noted)
Maximum Temperatures
Storage Temperature
Operating Junction Temperature
-V
GSS
-I
G(f)
-I
G
-55 to +150°C
-55 to +150°C
1
IΔV
GS1-2
/ΔT│=5µV/°C max.
I
G
=150fA TYP.
V
P
=2V TYP.
1
Case & Body
Maximum Voltage and Current for Each Transistor
Gate Voltage to Drain or Source 40V
Gate Forward Current
Gate Reverse Current
10mA
10µA
500mW
2
Top View
SOIC
Top View
TO-78
Maximum Power Dissipation
Device Dissipation @ TA=25ºC - Total
ELECTRICAL CHARACTERISTICS @ 25ºC (unless otherwise noted)
SYMBOL
│∆V
GS1-2
/∆T│max.
│V
GS1-2
│max.
-I
G
Max
-I
G
Max
-I
GSS
Max
-I
GSS
Max
SYMBOL
BV
GSS
BV
GGO
G
fss
G
fs
│G
fs1
/G
fs2
│
I
DSS
│I
DSS1
/I
DSS2
│
V
GS
(off)
V
GS
I
GGO
3
3
CHARACTERISTIC
Drift vs. Temperature
Offset Voltage
Operating
High Temperature
Gate Reverse Current
Gate Reverse Current
CHARACTERISTIC
Breakdown Voltage
Gate-to-Gate Breakdown
TRANSCONDUCTANCE
Full Conduction
Typical Operation
Transconductance Ratio
DRAIN CURRENT
Full Conduction
Drain Current Ratio
GATE VOLTAGE
LS5906 LS5907 LS5908 LS5909 LS5905 UNITS
5
5
1
1
2
5
MIN.
-40
±40
70
50
--
60
--
-0.6
--
--
10
5
1
1
2
5
TYP.
-60
--
300
100
1
400
2
-2
--
±1
20
10
1
1
2
5
MAX.
--
--
500
200
5
1000
5
-4.5
-4
--
40
15
1
1
2
5
UNITS
V
V
µS
µS
%
µA
%
V
V
pA
V
DS
= 10V
V
DS
= 10V
V
GG
= 20V
V
DG
= 10V
40
15
3
3
5
10
µV/ºC
mV
pA
nA
pA
nA
CONDITIONS
V
DG
= 10V, I
D
=30µA
T
A
= -55ºC to +125ºC
V
DG
=10V
T
A
=+125 ºC
V
DS
=0V
T
A
=+125 ºC
V
GS
=-20V
I
D
=30µA
CONDITIONS
V
DS
= 0
I
GG
= ±1µA
V
DG
= 10V
V
DG
= 10V
I
D
= -1µA
I
D
= 0
V
GS
= 0
I
D
= 30µA
I
S
= 0
f = 1kHz
f = 1kHz
V
GS
= 0
Gate-Source Cutoff Voltage
Operating Range
GATE CURRENT
Gate-to-Gate Leakage
I
D
= 1nA
I
D
= 30µA
Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
6/07/2012 Rev#A7 ECN# LS5905 LS5906 LS5907 LS5908 LS5909
SYMBOL
g
oss
g
os
│g
os1-2
│
CMRR
CMRR
NF
e
n
CHARACTERISTIC
OUTPUT CONDUCTANCE
Full Conduction
Operating
Differential
COMMON MODE REJECTION
-20 log │ΔV
GS1-2
/ΔV
DS
│
-20 log │ΔV
GS1-2
/ΔV
DS
│
NOISE
Figure
Voltage
CAPACITANCE
MIN.
--
--
--
--
--
--
--
TYP.
--
0.1
0.01
90
90
--
20
MAX.
5
--
0.2
--
--
1
70
UNITS
µS
µS
µS
dB
dB
dB
nV/√Hz
CONDITIONS
V
DG
= 10V V
GS
= 0
V
DG
= 10V I
D
= 30µA
ΔV
DS
= 10 to 20V
ΔV
DS
= 5 to 10V
V
DS
= 10V V
GS
= 0
f= 100Hz NBW=6Hz
V
DS
= 10V I
D
= 30µA
NBW=1Hz
I
D
=30µA
I
D
=30µA
R
G
=10MΩ
f= 10Hz
C
ISS
C
RSS
C
DD
Input
Reverse Transfer
Drain-to-Drain
--
--
--
--
--
--
3
1.5
0.1
pF
pF
pF
V
DS
= 10V V
GS
= 0
V
DS
= 10V V
GS
= 0
f= 1MHz
f= 1MHz
V
DG
= 20V I
D
= 30µA f= 1MHz
0.210
0.170
4
8
All dimensions in inches.
NOTES:
1. These ratings are limiting values above which the serviceability of any semiconductor may be impaired
2. Derate 4mWºC above 25ºC
3. Assume smaller value in the numerator.
Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing
high-quality discrete components. Expertise brought to LIS is based on processes and products developed
at Amelco, Union Carbide, Intersil and Micro Power Systems by company President John H. Hall. Hall,
a protégé of Silicon Valley legend Dr. Jean Hoerni, was the director of IC Development at Union Carbide,
co-founder and vice president of R&D at Intersil, and founder/president of Micro Power Systems.
Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
6/07/2012 Rev#A7 ECN# LS5905 LS5906 LS5907 LS5908 LS5909
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