TISP61089D, TISP61089SD, TISP61089AD,
TISP61089ASD, TISP61089P, TISP61089AP
DUAL FORWARD-CONDUCTING P-GATE THYRISTORS
PROGRAMMABLE OVERVOLTAGE PROTECTORS
TISP61089 Gated Protector Series
Overvoltage Protection for Negative Rail SLICs
Dual Voltage-Tracking Protectors
- ‘61089 for Battery Voltages to ......................................... -75 V
- ‘61089A for Battery Voltages to ..................................... -100 V
- Low Gate Triggering Current ....................................... < 5 mA
- High Holding Current ............................................... > 150 mA
Rated for GR-1089-CORE and K.44 Impulses
Impulse Wave Shape I
PPSM
A
Voltage
Current
2/10
10/700
10/1000
2/10
5/310
10/1000
120
40
30
2/10 Overshoot Voltage Specified
Element
Diode
SCR
I
PP
= 100 A, 2/ 10
V
8
12
Package Options
- Surface Mount 8-pin Small-Outline
Line Feed-Thru Connection (D)
Shunt Version Connection (SD)
- Through-Hole 8-pin DIP (P)
..................................................... UL Recognized Components
D Package, P Package Top Views and Device Symbol for Feed-Thru Pin-Out
(Tip)
(Gate)
K1
G
NC
(Ring)
K2
1
2
3
4
8
7
6
5
K1 (Tip)
A
A
(Ground)
(Ground)
G
A
A
K1
K1
K2 (Ring)
MD6XBD
NC - No internal connection
Terminal typical application names shown in
parenthesis
K2
K2
SD6XAEB
D Package Top View and Device Symbol for Shunt (SD) Pin-Out
(Tip)
(Gate)
K1
G
NC
(Ring)
K2
1
2
3
4
8
7
6
5
NC
A
A
NC
MD6XBE
K1
(Ground)
(Ground)
G
A
A
NC - No internal connection
Terminal typical application names shown in
parenthesis
K2
SD6XAU
How To Order
Device
TISP61089
Package
D (Small-Outline)
Carrier
R†
Tube
R†
Tube
Tube
Order as
TISP61089DR
TISP61089D
TISP61089SDR
TISP61089SD
TISP61089P
TISP61089AS
TISP61089A
D (Small-Outline)
P (8-pin DIP)
TISP61089A
D (Small-Outline)
Device
Package
Carrier
R†
Tube
R†
Tube
Tube
Order as
TISP61089ADR
TISP61089AD
TISP61089ASDR
TISP61089ASD
TISP61089AP
TISP61089S
TISP61089
D (Small-Outline)
P (8-pin DIP)
† Carrier R is Embossed Tape Reeled
† Carrier R is Embossed Tape Reeled
NOVEMBER 1995 - REVISED AUGUST 2002
Specifications are subject to change without notice.
1
TISP61089 Gated Protector Series
Description
These ‘61089 parts are all dual forward-conducting buffered p-gate thyristor (SCR) overvoltage protectors. They are designed to protect
monolithic SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and
induction. The ‘61089 limits voltages that exceed the SLIC supply rail voltage. The ‘61089 parameters are specified to allow equipment
compliance with Telcordia (formally Bellcore) GR-1089-CORE and ITU-T recommendations K.20, K.21 and K.45.
The SLIC line driver section is typically powered from 0 V (ground) and a negative (battery) voltage. The protector gate is connected to this
negative supply. This references the protection (clipping) voltage to the negative supply voltage. The protection voltage will then track the
negative supply voltage and the overvoltage stress on the SLIC is minimized.
Positive overvoltages are clipped to ground by diode forward conduction. Negative overvoltages are initially clipped close to the SLIC
negative supply rail value. If sufficient current is available from the overvoltage, then the protector SCR will switch into a low voltage on-state
condition. As the overvoltage subsides the high holding current of ‘61089 SCR avoids d.c. latchup.
The ‘61089 is intended to be used with a series resistance of at least 25
Ω
and a suitable overcurrent function for Telcordia compliance. Power
fault conditions require a series overcurrent element which either interrupts or reduces the circuit current before the ‘61089 current rating is
exceeded. For equipment compliant to ITU-T recommendations K.20 or K.21 or K.45 only, the series resistor value is set by the coordination
requirements. For coordination with a 400 V limit GDT, a minimum series resistor value of 10
Ω
is recommended.
The ‘61089 buffered gate design reduces the loading on the SLIC supply during overvoltages caused by power cross and induction. The
regular pin-out for surface mount and through-hole packages is a feed through configuration. Connection to the SLIC is made via the ‘61089,
Ring through pins 4 - 5 and Tip through pins 1 - 8. A non-feed-through surface mount (D) package is available. This shunt (SD) version pin-out
does not make duplicate connections to pin 5 and pin 8 which increases package creepage distance from ground of the other connections
from about 0.7 mm to over 3 mm. High voltage ringing SLICs, with battery voltages below -100 V and down to -155 V, can be protected by the
TISP61089B device. Details of this device are in the TISP61089B data sheet.
Absolute Maximum Ratings, -40
°C
≤
TJ
≤
85
°C
(Unless Otherwise Noted)
Rating
Repetitive peak off-state voltage, V
GK
= 0
Repetitive peak gate-cathode voltage, V
KA
= 0
Non-repetitive peak on-state pulse current (see Notes 1 and 2)
10/1000
µs
(Telcordia (Bellcore) GR-1089-CORE, Issue 2, February 1999, Section 4)
5/320
µs
(ITU-T K.20, K.21& K.45, K.44 open-circuit voltage wave shape 10/700
µs)
1.2/50
µs
(Telcordia (Bellcore) GR-1089-CORE, Issue 2, February 1999, Section 4)
2/10
µs
(Telcordia (Bellcore) GR-1089-CORE, Issue 2, February 1999, Section 4)
Non-repetitive peak on-state current, V
GG
= -75 V, 50 Hz to 60 Hz (see Notes 1 and 2)
0.1 s
1s
5s
300 s
900 s
Non-repetitive peak gate current, 1/2
µs
pulse, cathodes commoned (see Notes 1 and 2)
Operating free-air temperature range
Junction temperature
Storage temperature range
I
GSM
T
A
T
J
T
stg
I
TSM
11
4.8
2.7
0.95
0.93
+40
-40 to +85
-40 to +150
-40 to +150
A
°C
°C
°C
A
I
PPSM
30
40
100
120
A
61089
‘61089A
61089
‘61089A
Symbol
V
DRM
V
GKRM
Value
-100
-120
-85
-120
Unit
V
V
NOTES: 1. Initially the protector must be in thermal equilibrium with -40
°C
≤
T
J
≤
85
°C.
T he surge may be repeated after the device returns
to its initial conditions. Gate voltage ranges are -20 V to -75 V for the ‘61089 and -20 V to -100 V for the ‘61089A.
2. The rated current values may be applied either to the Ring to Ground or to the Tip to Ground terminal pairs. Additionally, both
terminal pairs may have their rated current values applied simultaneously (in this case the Ground terminal current will be twice
the rated current value of an individual terminal pair). Above 85
°C,
derate linearly to zero at 150
°C
lead temperature.
NOVEMBER 1995 - REVISED AUGUST 2002
Specifications are subject to change without notice.
2
TISP61089 Gated Protector Series
Recommended Operating Conditions
Component
C
G
Gate decoupling capacitor
Series resistor for GR-1089-CORE first-level surge survival
R
S
Series resistor for GR-1089-CORE first-level and second-level surge survival
Series resistor for GR-1089-CORE intra-building port surge survival
Series resistor for K.20, K.21 and K.45 coordination with a 400 V primary protector
Min
100
25
40
8
10
Typ
220
Max
Unit
nF
Ω
Ω
Ω
Ω
Electrical Characteristics, TJ = 25
°C
(Unless Otherwise Noted)
Parameter
I
D
Off-state current
V
D
= V
DRM
, V
GK
= 0
Test Conditions
T
J
= 25
°C
T
J
= 85
°C
-57
-60
-60
-64
9
12
12
16
3
6
8
8
12
-150
T
J
= 25
°C
T
J
= 85
°C
-5
-50
5
2.5
0.1
100
50
mA
µA
µA
mA
V
µC
pF
pF
V
V
V
V
Min
Typ
Max
-5
-50
Unit
µA
µA
V
(BO)
Breakover voltage
2/10
µs,
I
PP
= -56 A, R
S
= 45
Ω,
V
GG
= -48 V, C
G
= 220 nF
2/10
µs,
I
PP
= -100 A, R
S
= 50
Ω,
V
GG
= -48 V, C
G
= 220 nF
1.2/50
µs,
I
PP
= -53 A, R
S
= 47
Ω,
V
GG
= -48 V, C
G
= 220 nF
1.2/50
µs,
I
PP
= -96 A, R
S
= 52
Ω,
V
GG
= -48 V, C
G
= 220 nF
2/10
µs,
I
PP
= -56 A, R
S
= 45
Ω,
V
GG
= -48 V, C
G
= 220 nF
2/10
µs,
I
PP
= -100 A, R
S
= 50
Ω,
V
GG
= -48 V, C
G
= 220 nF
1.2/50
µs,
I
PP
= -53 A, R
S
= 47
Ω,
V
GG
= -48 V, C
G
= 220 nF
1.2/50
µs,
I
PP
= -96 A, R
S
= 52
Ω,
V
GG
= -48 V, C
G
= 220 nF
I
F
= 5 A, t
w
= 200
µs
2/10
µs,
I
PP
= 56 A, R
S
= 45
Ω,
V
GG
= -48 V, C
G
= 220 nF
2/10
µs,
I
PP
= 100 A, R
S
= 50
Ω,
V
GG
= -48 V, C
G
= 220 nF
1.2/50
µs,
I
PP
= 53 A, R
S
= 47
Ω,
V
GG
= -48 V, C
G
= 220 nF
1.2/50
µs,
I
PP
= 96 A, R
S
= 52
Ω,
V
GG
= -48 V, C
G
= 220 nF
I
T
= -1 A, di/dt = 1A/ms, V
GG
= -48 V
V
GG
= V
GK
= V
GKRM
, V
KA
= 0
I
T
= -3 A, t
p(g)
≥
20
µs,
V
GG
= -48 V
I
T
= -3 A, t
p(g)
≥
20
µs,
V
GG
= -48 V
1.2/50
µs,
I
PP
= -53 A, R
S
= 47
Ω,
V
GG
= -48 V, C
G
= 220 nF
f = 1 MHz, V
d
= 1 V, I
G
= 0, (see Note 3)
V
D
= -3 V
V
D
= -48 V
V
GK(BO)
Gate-cathode impulse
breakover voltage
Forward voltage
Peak forward recovery
voltage
Holding current
Gate reverse current
Gate trigger current
Gate-cathode trigger
voltage
Gate switching charge
Cathode-anode off-
state capacitance
V
F
V
FRM
I
H
I
GKS
I
GT
V
GT
Q
GS
C
KA
NOTES: 3. These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured
device terminals are a.c. connected to the guard terminal of the bridge.
Thermal Characteristics
Parameter
R
θ
JA
Junction to free air thermal resistance
Test Conditions
T
A
= 25
°C,
EIA/JESD51-3
PCB, EIA/JESD51-2
environment, P
TOT
= 1.7 W
P package
100
D Package
Min
Typ
Max
120
°C/W
Unit
NOVEMBER 1995 - REVISED AUGUST 2002
Specifications are subject to change without notice.
3
Embedded System
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