HD61202
(Dot Matrix Liquid Crystal Graphic
Display Column Driver)
Description
HD61202 is a column (segment) driver for dot
matrix liquid crystal graphic display systems. It
stores the display data transferred from a 8-bit
micro controller in the internal display RAM and
generates dot matrix liquid crystal driving signals.
Each bit data of display RAM corresponds to
on/off state of a dot of a liquid crystal display to
provide more flexible than character display.
As it is internally equipped with 64 output drivers
for display, it is available for liquid crystal graphic
displays with many dots.
The HD61202, which is produced in the CMOS
process, can complete portable battery drive
equipment in combination with a CMOS micro-
controller, utilizing the liquid crystal display’s low
power dissipation.
Moreover it can facilitate dot matrix liquid crystal
graphic display system configuration in combina-
tion with the row (common) driver HD61203.
Features
• Dot matrix liquid crystal graphic display column
driver incorporating display RAM
• RAM data direct display by internal display
RAM
— RAM bit data 1: On
•
•
•
•
•
— RAM bit data 0: Off
Internal display RAM address counter preset,
increment
Display RAM capacity: 512 bytes (4096 bits)
8-bit parallel interface
Internal liquid crystal display driver circuit: 64
Display duty cycle
Drives liquid crystal panels with 1/32–1/64 duty
cycle multiplexing
Wide range of instruction function
Display data read/write, display on/off, set
address, set display start line, read status
Lower power dissipation: during display 2 mW
max
Power supply: V
CC
: 5 V ± 10%
Liquid crystal display driving voltage: 8 V to
17 V
CMOS process
•
•
•
•
•
Ordering Information
Type No.
HD61202
HD61202TFIA
HD61202D
Package
100-pin plastic QFP (FP-100)
100-pin thin plastic QFP
(TFP-100B)
Chip
HD61202
Terminal Functions
Terminal
Name
V
CC
GND
Number of
Terminals
2
I/O
Connected
to
Power supply
Functions
Power supply for internal logic.
Recommended voltage is:
GND = 0 V
V
CC
= 5 V ± 10%
V
EE1
V
EE2
2
Power supply
Power supply for liquid crystal display drive circuit.
Recommended power supply voltage is V
CC
– V
EE
=
8 to 17 V. Connect the same power supply to V
EE1
and V
EE2
. V
EE1
and V
EE2
are not connected each
other in the LSI.
8
Power supply
Power supply for liquid crystal display drive.
Apply the voltage specified depending on liquid
crystals within the limit of V
EE
through V
CC
.
V1L (V1R), V2L (V2R): Selection level
V3L (V3R), V4L (V4R): Non-selection level
Power supplies connected with V1L and V1R (V2L &
V2R, V3L & V3R, V4L & V4R) should have the
same voltages.
CS1
CS2
CS3
3
I
MPU
Chip selection.
Data can be input or output when the terminals are
in the following conditions:
Terminal name
Condition
E
1
I
MPU
Enable.
At write (R/W = low): Data of DB0 to DB7 is latched
at the fall of E.
At read (R/W = high): Data appears at DB0 to DB7
while E is at high level.
R/W
1
I
MPU
Read/write.
R/W = High: Data appears at DB0 to DB7 and can
be read by the MPU.
When E = high, CS1, CS2 = low and
CS3 = high.
R/W = Low: DB0 to DB7 can accept at fall of E
when CS1, CS2 = low and CS3 =
high.
D/I
1
I
MPU
Data/instruction.
D/I = High:
D/I = Low:
Indicates that the data of DB0 to DB7
is display data.
Indicates that the data of DB0 to DB7
is display control data.
CS1
L
CS2
L
CS3
H
V1L, V1R
V2L, V2R
V3L, V3R
V4L, V4R
770
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