SN74AUP2G80RSER datasheet, PDF

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SN74AUP2G80RSER: DescriptionLow-Power Dual Positive-Edge-Triggered D-Type Flip-Flop 8-UQFN -40 to 85; Categorylogic logic; File Size1MB，23 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/; Environmental Compliance

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SN74AUP2G80RSER Overview

Low-Power Dual Positive-Edge-Triggered D-Type Flip-Flop 8-UQFN -40 to 85

SN74AUP2G80RSER Parametric

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Texas Instruments
Parts packaging code	QFN
package instruction	VQCCN, LCC8,.06SQ,20
Contacts	8
Reach Compliance Code	compli
ECCN code	EAR99
Factory Lead Time	6 weeks
series	AUP/ULP/V
JESD-30 code	S-XQCC-N8
JESD-609 code	e4
length	1.5 mm
Load capacitance (CL)	30 pF
Logic integrated circuit type	D FLIP-FLOP
Maximum Frequency@Nom-Su	80000000 Hz
MaximumI(ol)	0.004 A
Humidity sensitivity level	1
Number of digits	1
Number of functions	2
Number of terminals	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output polarity	TRUE
Package body material	UNSPECIFIED
encapsulated code	VQCCN
Encapsulate equivalent code	LCC8,.06SQ,20
Package shape	SQUARE
Package form	CHIP CARRIER, VERY THIN PROFILE
method of packing	TR
Peak Reflow Temperature (Celsius)	260
power supply	1.2/3.3 V
Maximum supply current (ICC)	0.0009 mA
Prop。Delay @ Nom-Su	28.7 ns
propagation delay (tpd)	28.7 ns
Certification status	Not Qualified
Maximum seat height	0.6 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	0.8 V
Nominal supply voltage (Vsup)	1.2 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag)
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
Trigger type	POSITIVE EDGE
width	1.5 mm
minfmax	260 MHz

SN74AUP2G80RSER Related Products

	SN74AUP2G80RSER	SN74AUP2G80DCUR	SN74AUP2G80YFPR	SN74AUP2G80DQER
Description	Low-Power Dual Positive-Edge-Triggered D-Type Flip-Flop 8-UQFN -40 to 85	Low-Power Dual Positive-Edge-Triggered D-Type Flip-Flop 8-VSSOP -40 to 85	Low-Power Dual Positive-Edge-Triggered D-Type Flip-Flop 8-DSBGA -40 to 85	Low-Power Dual Positive-Edge-Triggered D-Type Flip-Flop 8-X2SON -40 to 85
Brand Name	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments
Is it lead-free?	Lead free	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	conform to	conform to
Parts packaging code	QFN	SOIC	BGA	QFN
package instruction	VQCCN, LCC8,.06SQ,20	VSSOP, TSSOP8,.12,20	VFBGA, BGA8,2X4,16	VSON, SOLCC8,.04,14
Contacts	8	8	8	8
Reach Compliance Code	compli	compli	compli	compli
ECCN code	EAR99	EAR99	EAR99	EAR99
series	AUP/ULP/V	AUP/ULP/V	AUP/ULP/V	AUP/ULP/V
JESD-30 code	S-XQCC-N8	R-PDSO-G8	R-XBGA-B8	R-PDSO-N8
JESD-609 code	e4	e4	e1	e4
length	1.5 mm	2.3 mm	1.57 mm	1.4 mm
Load capacitance (CL)	30 pF	30 pF	30 pF	30 pF
Logic integrated circuit type	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP
Maximum Frequency@Nom-Su	80000000 Hz	80000000 Hz	80000000 Hz	80000000 Hz
MaximumI(ol)	0.004 A	0.004 A	0.004 A	0.004 A
Humidity sensitivity level	1	1	1	1
Number of digits	1	1	1	1
Number of functions	2	2	2	2
Number of terminals	8	8	8	8
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C
Output polarity	TRUE	TRUE	TRUE	TRUE
Package body material	UNSPECIFIED	PLASTIC/EPOXY	UNSPECIFIED	PLASTIC/EPOXY
encapsulated code	VQCCN	VSSOP	VFBGA	VSON
Encapsulate equivalent code	LCC8,.06SQ,20	TSSOP8,.12,20	BGA8,2X4,16	SOLCC8,.04,14
Package shape	SQUARE	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	CHIP CARRIER, VERY THIN PROFILE	SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	SMALL OUTLINE, VERY THIN PROFILE
method of packing	TR	TR	TR	TR
Peak Reflow Temperature (Celsius)	260	260	260	260
power supply	1.2/3.3 V	1.2/3.3 V	1.2/3.3 V	1.2/3.3 V
Maximum supply current (ICC)	0.0009 mA	0.0009 mA	0.0009 mA	0.0009 mA
Prop。Delay @ Nom-Su	28.7 ns	28.7 ns	28.7 ns	28.7 ns
propagation delay (tpd)	28.7 ns	28.7 ns	28.7 ns	28.7 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	0.6 mm	0.9 mm	0.5 mm	0.4 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	0.8 V	0.8 V	0.8 V	0.8 V
Nominal supply voltage (Vsup)	1.2 V	1.2 V	1.2 V	1.2 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag)	Nickel/Palladium/Gold (Ni/Pd/Au)	Tin/Silver/Copper (Sn/Ag/Cu)	Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag)
Terminal form	NO LEAD	GULL WING	BALL	NO LEAD
Terminal pitch	0.5 mm	0.5 mm	0.4 mm	0.35 mm
Terminal location	QUAD	DUAL	BOTTOM	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
Trigger type	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
width	1.5 mm	2 mm	0.77 mm	1 mm
minfmax	260 MHz	260 MHz	260 MHz	260 MHz
Factory Lead Time	6 weeks	6 weeks	1 week	-

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