P R E L I M I N A R Y
Z86C60/65
CP96Z8X0400
P
RELIMINARY
C
USTOMER
P
ROCUREMENT
S
PECIFICATION
Z86C60/65
CMOS Z8
®
32KROMM
ICROCONTROLLER
FEATURES
Part
Z86C60
Z86C65
ROM
(KB)
16
32
RAM*
(Bytes)
256
256
I/O
22
22
Speed 28-pin
(MHz) DIP
16
16
X
X
s
s
s
Low EMI Mode Option
Auto Latches
Two Programmable 8-Bit Counter/Timers Each with 6-
Bit Programmable Prescaler
Three Vectored, Priority Interrupts from Three Different
Sources
On-Chip Oscillator that Accepts a Crystal Ceramic
Resonator, LC, or External Clock Source
ROM Mask Options:
– ROM Protect
– RAM Protect
*General-Purpose
s
s
s
s
s
28-Pin DIP Package
3.0V to 5.5V Operating Range
Low-Power Consumption: 200 mW
Fast Instruction Pointer: 0.75
µs
@ 16 MHz
Two Standby Modes: STOP and HALT
s
s
s
GENERAL DESCRIPTION
The Z86C60/65 microcontrollers introduce a new level of
sophistication to single-chip architecture. The Z86C65 is a
member of the Z8 single-chip microcontroller family with
32 Kbytes of ROM and 256 bytes of RAM. The Z86C60 is
identical, except that it only has 16 Kbytes of ROM.
The Z86C60/65 are housed in a 28-pin DIP package, and
manufactured in CMOS technology. The Z86C96 ROMless
Z8 will support the Z86C60/65.
Zilog’s CMOS microcontroller offers fast execution, more
efficient use of memory, more sophisticated interrupts,
input/output bit manipulation capabilities, and easy hard-
ware/software system expansion along with low cost and
low power consumption.
The Z86C60/65 architecture is characterized by Zilog’s
8-bit microcontroller core. The device offers a flexible I/O
scheme, an efficient register and address space structure,
multiplexed capabilities between address/data, I/O, and a
number of ancillary features that are useful in many indus-
trial and advanced scientific applications.
For applications which demand powerful I/O capabilities,
the Z86C60/65 fulfills this with 22 pins dedicated to input
and output. These lines are grouped into four ports. Each
port is configurable under software control to provide
timing, status signals, serial or parallel I/O with or without
handshake, and an address/data bus for interfacing exter-
nal memory.
There are three basic address spaces available to support
this wide range of configurations: Program Memory, Data
Memory, and 236 General-Purpose Registers.
To unburden the program from coping with the real-time
problems such as counting/timing and serial data commu-
nication, the Z86C60/65 offers two on-chip counter/timers
with a large number of user selectable modes.
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.,
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection
Power
Ground
Circuit
V
CC
GND
Device
V
DD
V
SS
CP96Z8X0400
(5/96)
1
P R E L I M I N A R Y
Z86C60/65
CP96Z8X0400
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
T
STG
T
A
Description
Min
Max
+7.0
+150
†
Units
V
C
Stresses greater than those listed under Absolute Maxi-
mum Ratings may cause permanent damage to the de-
vice. This is a stress rating only; operation of the device at
any condition above those indicated in the operational
sections of these specifications is not implied. Exposure to
absolute maximum rating conditions for an extended pe-
riod may affect device reliability.
Supply Voltage*
–0.3
Storage Temp
–65
Oper Ambient Temp
†
Notes:
* Voltages on all pins with respect to GND.
† See ordering information
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test
conditions as noted. All voltages are referenced to GND.
Positive current flows into the referenced pin (Test Load).
From Output
Under Test
I
150 pF
Figure 3. Test Load Diagram
4
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