Zilog
P R E L I M I N A R Y
Z80185/Z80195
S
MART
P
ERIPHERAL
C
ONTROLLES
P
RELIMINARY
P
RODUCT
S
PECIFICATION
Z80185/Z80195
S
MART
P
ERIPHERAL
C
ONTROLLERS
FEATURES
Part
Z80185
Z80195
s
s
s
s
ROM
(KB)
32 x 8
0
UART
Baud Rate
512 Kbps
512 Kbps
Speed
(MHz)
20, 33
20, 33
s
s
s
100-Pin QFP Package
s
5.0-Volt Operating Range
s
Low-Power Consumption
s
0°C to +70°C Temperature Range
Low-EMI Option
Bidirectional Centronics Interface (IEEE 1284)
Two 8-Bit Parallel I/O Ports
Enhanced Z8S180 MPU
Four Z80 CTC Channels
One Channel ESCC
™
Controller
GENERAL DESCRIPTION
The Z80185 and Z80195 are smart peripheral controller
devices designed for general data communications appli-
cations, and architected specifically to accommodate all
input and output (I/O) requirements for serial and parallel
connectivity. Combining a high-performance CPU core
with a variety of system and I/O resources, the Z80185/195
are useful in a broad range of applications. The Z80195 is
the ROMless version of the device.
The Z80185 and Z80195 feature an enhanced Z8S180
microprocessor linked with one enhanced channel of the
Z85230 ESCC
™
serial communications controller, and 25
bits of parallel I/O, allowing software code compatibility
with existing software code.
Seventeen lines can be configured as bidirectional
Centronics (IEEE 1284) controllers. When configured as a
1284 controller, an I/O line can operate in either the host or
peripheral role in compatible, nibble, byte or ECP mode. In
addition, the Z80185 includes 32 Kbytes of on-chip ROM.
These devices are well-suited for external modems using
a parallel interface, protocol translators, and cost-effective
WAN adapters. The Z80185/195 is ideal for handling all
laser printer I/O, as well as the main processor in cost-
effective printer applications.
Notes:
All Signals with a preceding front slash, "/", are active Low.
Power connections follow conventional descriptions below:
Connection
Power
Ground
Circuit
V
CC
GND
Device
V
DD
V
SS
DS971850301
1
Zilog
P R E L I M I N A R Y
Z80185/Z80195
S
MART
P
ERIPHERAL
C
ONTROLLERS
ABSOLUTE MAXIMUM RATINGS
Symbol Description
V
CC
V
IN
T
OPR
T
STG
Min
Max
+7.0
V
CC
+0.3
70
+150
Units
V
V
°C
°C
Stresses greater than those listed under Absolute Maxi-
mum Ratings may cause permanent damage to the de-
vice. This is a stress rating only; operation of the device at
any condition above those indicated in the operational
sections of these specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods
may affect device reliability.
Supply Voltage
–0.3
Input Voltage
–0.3
Operating Temp.
0
Storage Temp.
–55
Notes:
Voltage on all pins with respect to GND. Permanent LSI damage may
occur if maximum ratings are exceeded. Normal operation should be
recommended operating conditions. If these conditions are exceeded, it
could affect reliability of LSI.
STANDARD TEST CONDITIONS
The DC Characteristics and capacitance sections below
apply for the following standard test conditions, unless
otherwise noted. All voltages are referenced to GND (0V).
Positive current flows into the referenced pin (Test Load).
Operating Temperature Range:
S = 0°C to 70°C
Voltage Supply Range:
+4.5V
≤
V
CC
≤
+5.5V
All AC parameters assume a load capacitance of 100 pF.
Add 10 ns delay for each 50 pF increase in load up to a
maximum of 150 pF for the data bus and 100 pF for
address and control lines. AC timing measurements are
referenced to 1.5 volts (except for clock, which is refer-
enced to the 10% and 90% points). Maximum capacitive
load for PHI is 125 pF.
100 pF
I
OL = 2 mA
1.4 V
I
OH = 250
µA
Figure 3. Test Load Diagram
4
DS971850301
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