DM9013 datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > DM9013

Preview

DM9013: Description10/100 Mbps 3-port Ethernet Switch Controller with General Processor Interface; File Size509KB，75 Pages; ManufacturerDavicom; Websitehttp://www.davicom.com.tw

Download Datasheet Compare View All

DM9013 Overview

10/100 Mbps 3-port Ethernet Switch Controller with General Processor Interface

Preview

Download Datasheet

View All

DAVICOM Semiconductor, Inc.

DM9013

10/100 Mbps 3-port Ethernet Switch Controller

with General Processor Interface

DATA SHEET

Preliminary

Version: DM9013--DS-P03

April 9, 2009

DM9013

3-port switch with Processor Interface

CONTENT

GENERAL DESCRIPTION............................................................................................. 10

BLOCK DIAGRAM......................................................................................................... 10

FEATURES .................................................................................................................... 11

PIN CONFIGURATION : 128 PIN LQFP........................................................................ 12

PIN DESCRIPTION ........................................................................................................ 13

5.1 Processor Bus Interface ............................................................................................................................... 13

5.2 General and LED pins ................................................................................................................................... 13

5.3 P2 MII / RMII / Reverse MII Interfaces .......................................................................................................... 13

5.3.1 MII Interfaces ........................................................................................................................................... 13

5.3.2 RMII Interfaces......................................................................................................................................... 14

5.3.3 Reverse MII Interfaces ............................................................................................................................. 14

5.4 EEPROM Interfaces ....................................................................................................................................... 15

5.5 LED Pins ......................................................................................................................................................... 15

5.6 Clock Interface............................................................................................................................................... 16

5.7 Network Interface .......................................................................................................................................... 16

5.8 Miscellaneous Pins ....................................................................................................................................... 16

5.9 Power Pins ..................................................................................................................................................... 16

5.10 Strap Pins Table .......................................................................................................................................... 17

5.10.1 Strap pin in 3-port mode......................................................................................................................... 17

5.10.2 Strap pin in 2-port mode......................................................................................................................... 18

Preliminary datasheet

DM9013-15-DS-P03

April 9, 2009

DM9013

3-port switch with Processor Interface

CONTROL AND STATUS REGISTER SET................................................................... 19

6.1 Network Control Register (00H) ................................................................................................................... 21

6.2 Network Status Register (01H)..................................................................................................................... 21

6.3 TX Control Register (02H)............................................................................................................................. 21

6.4 RX Control Register (05H) ............................................................................................................................ 21

6.5 RX Status Register (06H) .............................................................................................................................. 22

6.6 Receive Overflow Counter Register (07H) .................................................................................................. 22

6.7 Flow Control Register (0AH)......................................................................................................................... 22

6.8 EEPROM & PHY Control Register (0BH) ..................................................................................................... 22

6.9 EEPROM & PHY Address Register (0CH) ................................................................................................... 22

6.10 EPROM & PHY Data Register (0DH~0EH) ................................................................................................. 22

6.11 Physical Address Register (10H~15H) ...................................................................................................... 23

6.12 Multicast Address Register (16H~1DH)..................................................................................................... 23

6.13 General Purpose Control Register (1EH) .................................................................................................. 23

6.14 General Purpose Register (1FH) ................................................................................................................ 23

6.15 RX Packet Length Low Register ( 20H ) .................................................................................................... 23

6.16 RX Packet Length High Register ( 21H ) ................................................................................................... 23

6.17 RX Additional Status Register ( 26H ) ....................................................................................................... 24

6.18 RX Additional Control Register ( 27H )...................................................................................................... 24

6.19 Vendor ID Register (28H~29H) ................................................................................................................... 24

Preliminary datasheet

DM9013-15-DS-P03

April 9, 2009

DM9013

3-port switch with Processor Interface

6.20 Product ID Register (2AH~2BH) ................................................................................................................. 24

6.21 Chip Revision Register (2CH) .................................................................................................................... 24

6.22 Transmit Control Register 2 (2DH) ............................................................................................................ 24

6.23 Transmit Check Sum Control Register (31H) ........................................................................................... 24

6.24 Receive Check Sum Control Status Register (32H)................................................................................. 25

6.25 General Purpose Control Register 2 (34H) ............................................................................................... 25

6.26 General Purpose Register 2 (35H) ............................................................................................................. 25

6.27 General Purpose Control Register 3 (36H) ............................................................................................... 25

6.28 General Purpose Register 3 (37H) ............................................................................................................. 25

6.29 Processor Data Bus driving capability Register (38H) ............................................................................ 26

6.30 Port 2 driving capability Register (3AH).................................................................................................... 26

6.31 IRQ Pin Control Register (39H) .................................................................................................................. 26

6.32 TX Block Size Control Register (3FH) ....................................................................................................... 26

6.33 Monitor Register 1 (40H) ............................................................................................................................. 27

6.34 Monitor Register 2 (41H) ............................................................................................................................. 27

6.35 Monitor Register 3 (42H) ............................................................................................................................. 27

6.36 Monitor Register 4 (43H) ............................................................................................................................. 27

6.37 Switch Control Register (52H).................................................................................................................... 27

6.38 VLAN Control Register (53H) ..................................................................................................................... 28

6.39 Switch Status Register (54H) ..................................................................................................................... 28

6.40 Bandwidth LED Control Register (55H)..................................................................................................... 28

Preliminary datasheet

DM9013-15-DS-P03

April 9, 2009

DM9013

3-port switch with Processor Interface

6.41 Per Port Control/Status Index Register (60H)........................................................................................... 28

6.42 Per Port Control Data Register (61H) ........................................................................................................ 28

6.43 Per Port Status Data Register (62H) .......................................................................................................... 29

6.44 Per Port Forward Control Register (65H) .................................................................................................. 29

6.45 Per Port Ingress/Egress Control Register (66H) ...................................................................................... 30

6.46 Bandwidth Control Setting Register (67H)................................................................................................ 31

6.47 Per Port Block Unicast ports Control Register (68H) .............................................................................. 31

6.48 Per Port Block Multicast ports Control Register (69H)............................................................................ 31

6.49 Per Port Block Broadcast ports Control Register (6AH) ......................................................................... 31

6.50 Per Port Block Unknown ports Control Register (6BH) .......................................................................... 32

6.51 Per Port Priority Queue Control Register (6DH)....................................................................................... 32

6.52 Per Port VLAN Tag Low Byte Register (6EH) ........................................................................................... 32

6.53 Per Port VLAN Tag High Byte Register (6FH)........................................................................................... 32

6.54 MIB counter Port Index Register (80H)...................................................................................................... 32

6.55 MIB counter Data Register (81H~84H)....................................................................................................... 32

6.56 Port-based VLAN mapping table Registers (B0H~BFH).......................................................................... 33

6.57 TOS Priority Map Registers (C0H~CFH).................................................................................................... 33

6.58 VLAN Priority Map Registers (D0H~D1H) ................................................................................................. 36

6.59 Memory Data Pre-Fetch Read Command without Address Increment Register (F0H) ........................ 36

6.60 Memory Data Read Command with Address Increment Register (F2H)................................................ 36

Preliminary datasheet

DM9013-15-DS-P03

April 9, 2009

DM9013 Related Products

	DM9013	DM9013EP
Description	10/100 Mbps 3-port Ethernet Switch Controller with General Processor Interface	10/100 Mbps 3-port Ethernet Switch Controller with General Processor Interface

Recommended Resources

Subwoofer low pass filter circuit diagram

High performance sample and hold circuit circuit diagram

Set battery low voltage threshold circuit diagram b

tone detector

60MHZ crystal oscillator circuit

Computer motherboard circuit diagram 820 1_05

R7F0C009 comparator configuration problem: [i=s]This post was last edited by shusheng88 on 2021-3-9 23:14[/i]Dear experts, I used AP4 to generate the comparator program of R7F0C009. I compared it with the chip manual and it seems to be fine. B...; shusheng88 Renesas Electronics MCUs

Cascade Engineering launches household waste tracking system: [Abstract] Cascade Engineering has launched an automated system consisting of smart trash bins, data readers and scales for use on garbage trucks. The system helps reduce landfill costs, reduce theft ...; JasonYoo RF/Wirelessly

About antenna receiving power and power amplification: Question 1: For an antenna, the energy sent out is dBm, and the unit of the received energy should still be dBm. The problem is that even when entering the PCB, the signal received should still be a v...; 呜呼哀哉 RF/Wirelessly

About IAR: I am using IAR Embedded Workbench v5.11. Note that it is v5.11. The board is ADuC7026. The program compiles and links fine, but debugging always fails with the message: unable to get contact with Rom-...; hd12 Embedded System

No response to TCP connection to Vxworks?: No response to the TCP connection of Vxworks. That is, after the first SYN packet of the three-way handshake was sent to the Vxworks system (sent using Telnet on XP on the Host), the system did not re...; 李红磊 Real-time operating system RTOS

Application program reads .txt file in WinCE and it is garbled: Write an MFC-based application that runs under WinCE and reads the contents of a .txt file. The structure is as follows: Book title 1; Price 1 Book title 2; Price 2 Book title 3; Price 3 ... CFile myf...; 力量 Embedded System

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components