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STG1764X-17

Description
PALETTE-DAC DSPL CTLR, PQFP128, PLASTIC, QFP-128
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size821KB,24 Pages
ManufacturerSTMicroelectronics
Websitehttp://www.st.com/
Download Datasheet Parametric Compare View All

STG1764X-17 Overview

PALETTE-DAC DSPL CTLR, PQFP128, PLASTIC, QFP-128

STG1764X-17 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSTMicroelectronics
Parts packaging codeQFP
package instructionPLASTIC, QFP-128
Contacts128
Reach Compliance Codenot_compliant
ECCN code3A001.A.3
Address bus width8
Bus compatibilityVESA
maximum clock frequency170 MHz
External data bus width8
JESD-30 codeS-PQFP-G128
JESD-609 codee0
length28 mm
Number of terminals128
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeQFP
Package shapeSQUARE
Package formFLATPACK
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height4.07 mm
Maximum supply voltage5.25 V
Minimum supply voltage4.75 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width28 mm
uPs/uCs/peripheral integrated circuit typeDISPLAY CONTROLLER, PALETTE DAC

STG1764X-17 Related Products

STG1764X-17 STG1732X-13 STG1764X-13
Description PALETTE-DAC DSPL CTLR, PQFP128, PLASTIC, QFP-128 PALETTE-DAC DSPL CTLR, PQFP100, PLASTIC, QFP-100 PALETTE-DAC DSPL CTLR, PQFP128, PLASTIC, QFP-128
Is it Rohs certified? incompatible incompatible incompatible
Maker STMicroelectronics STMicroelectronics STMicroelectronics
Parts packaging code QFP QFP QFP
package instruction PLASTIC, QFP-128 PLASTIC, QFP-100 PLASTIC, QFP-128
Contacts 128 100 128
Reach Compliance Code not_compliant not_compliant not_compliant
ECCN code 3A001.A.3 3A001.A.3 3A001.A.3
Address bus width 8 8 8
Bus compatibility VESA VESA VESA
maximum clock frequency 170 MHz 135 MHz 135 MHz
External data bus width 8 8 8
JESD-30 code S-PQFP-G128 R-PQFP-G100 S-PQFP-G128
JESD-609 code e0 e0 e0
length 28 mm 20 mm 28 mm
Number of terminals 128 100 128
Maximum operating temperature 70 °C 70 °C 70 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code QFP QFP QFP
Package shape SQUARE RECTANGULAR SQUARE
Package form FLATPACK FLATPACK FLATPACK
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Certification status Not Qualified Not Qualified Not Qualified
Maximum seat height 4.07 mm 3.4 mm 4.07 mm
Maximum supply voltage 5.25 V 5.25 V 5.25 V
Minimum supply voltage 4.75 V 4.75 V 4.75 V
Nominal supply voltage 5 V 5 V 5 V
surface mount YES YES YES
technology CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form GULL WING GULL WING GULL WING
Terminal pitch 0.8 mm 0.65 mm 0.8 mm
Terminal location QUAD QUAD QUAD
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 28 mm 14 mm 28 mm
uPs/uCs/peripheral integrated circuit type DISPLAY CONTROLLER, PALETTE DAC DISPLAY CONTROLLER, PALETTE DAC DISPLAY CONTROLLER, PALETTE DAC
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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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